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author | John Baldwin <jhb@FreeBSD.org> | 2019-03-12 13:39:02 -0700 |
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committer | John Baldwin <jhb@FreeBSD.org> | 2019-03-12 13:45:23 -0700 |
commit | dd6876c91cd40cc105b1a91f418ca2c80683b314 (patch) | |
tree | 394033e0658212a6461dd32784d158ff1d16f6e6 /gdb/i386-bsd-nat.c | |
parent | 1163a4b7a38a79ebd153dc5ee76ce93877d21dbd (diff) | |
download | gdb-dd6876c91cd40cc105b1a91f418ca2c80683b314.zip gdb-dd6876c91cd40cc105b1a91f418ca2c80683b314.tar.gz gdb-dd6876c91cd40cc105b1a91f418ca2c80683b314.tar.bz2 |
Support fs_base and gs_base on FreeBSD/i386.
The i386 BSD native target uses the same ptrace operations
(PT_[GS]ET[FG]SBASE) as the amd64 BSD native target to fetch and store
the registers.
The amd64 BSD native now uses 'tdep->fsbase_regnum' instead of
hardcoding AMD64_FSBASE_REGNUM and AMD64_GSBASE_REGNUM to support
32-bit targets. In addition, the store operations explicitly zero the
new register value before fetching it from the register cache to
ensure 32-bit values are zero-extended.
gdb/ChangeLog:
* amd64-bsd-nat.c (amd64bsd_fetch_inferior_registers): Use
tdep->fsbase_regnum instead of constants for fs_base and gs_base.
(amd64bsd_store_inferior_registers): Likewise.
* amd64-fbsd-nat.c (amd64_fbsd_nat_target::read_description):
Enable segment base registers.
* i386-bsd-nat.c (i386bsd_fetch_inferior_registers): Use
PT_GETFSBASE and PT_GETGSBASE.
(i386bsd_store_inferior_registers): Use PT_SETFSBASE and
PT_SETGSBASE.
* i386-fbsd-nat.c (i386_fbsd_nat_target::read_description): Enable
segment base registers.
* i386-fbsd-tdep.c (i386fbsd_core_read_description): Likewise.
Diffstat (limited to 'gdb/i386-bsd-nat.c')
-rw-r--r-- | gdb/i386-bsd-nat.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/gdb/i386-bsd-nat.c b/gdb/i386-bsd-nat.c index 009a8dc..a10b496 100644 --- a/gdb/i386-bsd-nat.c +++ b/gdb/i386-bsd-nat.c @@ -144,6 +144,33 @@ i386bsd_fetch_inferior_registers (struct regcache *regcache, int regnum) return; } +#ifdef PT_GETFSBASE + if (regnum == -1 || regnum == I386_FSBASE_REGNUM) + { + register_t base; + + if (ptrace (PT_GETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) + perror_with_name (_("Couldn't get segment register fs_base")); + + regcache->raw_supply (I386_FSBASE_REGNUM, &base); + if (regnum != -1) + return; + } +#endif +#ifdef PT_GETGSBASE + if (regnum == -1 || regnum == I386_GSBASE_REGNUM) + { + register_t base; + + if (ptrace (PT_GETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) + perror_with_name (_("Couldn't get segment register gs_base")); + + regcache->raw_supply (I386_GSBASE_REGNUM, &base); + if (regnum != -1) + return; + } +#endif + if (regnum == -1 || regnum >= I386_ST0_REGNUM) { struct fpreg fpregs; @@ -211,6 +238,33 @@ i386bsd_store_inferior_registers (struct regcache *regcache, int regnum) return; } +#ifdef PT_SETFSBASE + if (regnum == -1 || regnum == I386_FSBASE_REGNUM) + { + register_t base; + + regcache->raw_collect (I386_FSBASE_REGNUM, &base); + + if (ptrace (PT_SETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) + perror_with_name (_("Couldn't write segment register fs_base")); + if (regnum != -1) + return; + } +#endif +#ifdef PT_SETGSBASE + if (regnum == -1 || regnum == I386_GSBASE_REGNUM) + { + register_t base; + + regcache->raw_collect (I386_GSBASE_REGNUM, &base); + + if (ptrace (PT_SETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) + perror_with_name (_("Couldn't write segment register gs_base")); + if (regnum != -1) + return; + } +#endif + if (regnum == -1 || regnum >= I386_ST0_REGNUM) { struct fpreg fpregs; |