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authorTom de Vries <tdevries@suse.de>2019-10-18 02:48:08 +0200
committerTom de Vries <tdevries@suse.de>2019-10-18 02:48:08 +0200
commit85102364b2d1845fe9ae7d70096671a3ea4bccf3 (patch)
tree131dd3a2a2dcbec325716193b2fa0c496d6701b7 /gdb/hppa-tdep.c
parent39849b0503152de7447b3da67ed9fa45fa9ba5fd (diff)
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[gdb] Fix more typos in comments
Fix typos in comments. NFC. Tested on x86_64-linux. gdb/ChangeLog: 2019-10-18 Tom de Vries <tdevries@suse.de> * aarch64-tdep.c: Fix typos in comments. * ada-lang.c: Same. * ada-tasks.c: Same. * alpha-tdep.c: Same. * alpha-tdep.h: Same. * amd64-nat.c: Same. * amd64-windows-tdep.c: Same. * arc-tdep.c: Same. * arc-tdep.h: Same. * arch-utils.c: Same. * arm-nbsd-tdep.c: Same. * arm-tdep.c: Same. * ax-gdb.c: Same. * blockframe.c: Same. * btrace.c: Same. * c-varobj.c: Same. * coff-pe-read.c: Same. * coffread.c: Same. * cris-tdep.c: Same. * darwin-nat.c: Same. * dbxread.c: Same. * dcache.c: Same. * disasm.c: Same. * dtrace-probe.c: Same. * dwarf-index-write.c: Same. * dwarf2-frame-tailcall.c: Same. * dwarf2-frame.c: Same. * dwarf2read.c: Same. * eval.c: Same. * exceptions.c: Same. * fbsd-tdep.c: Same. * findvar.c: Same. * frame.c: Same. * frv-tdep.c: Same. * gnu-v3-abi.c: Same. * go32-nat.c: Same. * h8300-tdep.c: Same. * hppa-tdep.c: Same. * i386-linux-tdep.c: Same. * i386-tdep.c: Same. * ia64-libunwind-tdep.c: Same. * ia64-tdep.c: Same. * infcmd.c: Same. * infrun.c: Same. * linespec.c: Same. * linux-nat.c: Same. * linux-thread-db.c: Same. * machoread.c: Same. * mdebugread.c: Same. * mep-tdep.c: Same. * mn10300-tdep.c: Same. * namespace.c: Same. * objfiles.c: Same. * opencl-lang.c: Same. * or1k-tdep.c: Same. * osabi.c: Same. * ppc-linux-nat.c: Same. * ppc-linux-tdep.c: Same. * ppc-sysv-tdep.c: Same. * printcmd.c: Same. * procfs.c: Same. * record-btrace.c: Same. * record-full.c: Same. * remote-fileio.c: Same. * remote.c: Same. * rs6000-tdep.c: Same. * s12z-tdep.c: Same. * score-tdep.c: Same. * ser-base.c: Same. * ser-go32.c: Same. * skip.c: Same. * sol-thread.c: Same. * solib-svr4.c: Same. * solib.c: Same. * source.c: Same. * sparc-nat.c: Same. * sparc-sol2-tdep.c: Same. * sparc-tdep.c: Same. * sparc64-tdep.c: Same. * stabsread.c: Same. * stack.c: Same. * symfile.c: Same. * symtab.c: Same. * target-descriptions.c: Same. * target-float.c: Same. * thread.c: Same. * utils.c: Same. * valops.c: Same. * valprint.c: Same. * value.c: Same. * varobj.c: Same. * windows-nat.c: Same. * xcoffread.c: Same. * xstormy16-tdep.c: Same. * xtensa-tdep.c: Same. Change-Id: I5175f1b107bfa4e1cdd4a3361ccb4739e53c75c4
Diffstat (limited to 'gdb/hppa-tdep.c')
-rw-r--r--gdb/hppa-tdep.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/gdb/hppa-tdep.c b/gdb/hppa-tdep.c
index c307de8..ae1554a 100644
--- a/gdb/hppa-tdep.c
+++ b/gdb/hppa-tdep.c
@@ -367,7 +367,7 @@ read_unwind_info (struct objfile *objfile)
/* For reasons unknown the HP PA64 tools generate multiple unwinder
sections in a single executable. So we just iterate over every
- section in the BFD looking for unwinder sections intead of trying
+ section in the BFD looking for unwinder sections instead of trying
to do a lookup with bfd_get_section_by_name.
First determine the total size of the unwind tables so that we
@@ -1182,7 +1182,7 @@ hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
if (len > 16)
{
- /* All return values larget than 128 bits must be aggregate
+ /* All return values larger than 128 bits must be aggregate
return values. */
gdb_assert (!hppa64_integral_or_pointer_p (type));
gdb_assert (!hppa64_floating_p (type));
@@ -1431,7 +1431,7 @@ is_branch (unsigned long inst)
- stw: 0x1a, store a word from a general register.
- stwm: 0x1b, store a word from a general register and perform base
- register modification (2.0 will still treate it as stw).
+ register modification (2.0 will still treat it as stw).
- std: 0x1c, store a doubleword from a general register (2.0 only).
@@ -1592,7 +1592,7 @@ restart:
For unoptimized GCC code and for any HP CC code this will never ever
examine any user instructions.
- For optimzied GCC code we're faced with problems. GCC will schedule
+ For optimized GCC code we're faced with problems. GCC will schedule
its prologue and make prologue instructions available for delay slot
filling. The end result is user code gets mixed in with the prologue
and a prologue instruction may be in the delay slot of the first branch
@@ -1759,7 +1759,7 @@ restart:
final_iteration = 1;
}
- /* We've got a tenative location for the end of the prologue. However
+ /* We've got a tentative location for the end of the prologue. However
because of limitations in the unwind descriptor mechanism we may
have went too far into user code looking for the save of a register
that does not exist. So, if there registers we expected to be saved
@@ -2869,7 +2869,7 @@ hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
return 1;
}
-/* This relaxed version of the insstruction matcher allows us to match
+/* This relaxed version of the instruction matcher allows us to match
from somewhere inside the pattern, by looking backwards in the
instruction scheme. */