* i387-fp.c, linux-arm-low.c, linux-cris-low.c,

	linux-crisv32-low.c, linux-i386-low.c, linux-low.c,
	linux-mips-low.c, linux-s390-low.c, linux-sparc-low.c,
	linux-x86-64-low.c, linux-xtensa-low.c, proc-service.c,
	regcache.c, remote-utils.c, server.c, spu-low.c, target.h,
	thread-db.c, win32-low.c, xtensa-xtregs.c, gdbreplay.c,
	Makefile.in, configure.ac: Fix whitespace throughout.
	* configure: Regenerate.

1 files changed, 22 insertions, 22 deletions

diff --git a/gdb/gdbserver/linux-crisv32-low.c b/gdb/gdbserver/linux-crisv32-low.c
index ca49cea..0838b65 100644
--- a/gdb/gdbserver/linux-crisv32-low.c
+++ b/gdb/gdbserver/linux-crisv32-low.c
@@ -44,11 +44,11 @@ static int cris_regmap[] = {
 
   25*4,
 
-  26*4, -1,   -1,   29*4, 
+  26*4, -1,   -1,   29*4,
   30*4, 31*4, 32*4, 33*4,
   34*4, 35*4, 36*4, 37*4,
   38*4, 39*4, 40*4, -1
-  
+
 };
 
 extern int debug_threads;
@@ -143,7 +143,7 @@ cris_insert_watchpoint (char type, CORE_ADDR addr, int len)
   unsigned long bp_ctrl;
   unsigned long start, end;
   unsigned long ccs;
-  
+
   /* Breakpoint/watchpoint types (GDB terminology):
      0 = memory breakpoint for instructions
      (not supported; done via memory write instead)
@@ -151,8 +151,8 @@ cris_insert_watchpoint (char type, CORE_ADDR addr, int len)
      2 = write watchpoint (supported)
      3 = read watchpoint (supported)
      4 = access watchpoint (supported).  */
-  
-  if (type < '2' || type > '4') 
+
+  if (type < '2' || type > '4')
     {
       /* Unsupported.  */
       return 1;
@@ -172,17 +172,17 @@ cris_insert_watchpoint (char type, CORE_ADDR addr, int len)
      be used.  Also, if a watch for a region that is already
      covered by one or more existing watchpoints, a new
      watchpoint will be used.  */
-    
+
   /* First, find a free data watchpoint.  */
   for (bp = 0; bp < 6; bp++)
     {
       /* Each data watchpoint's control registers occupy 2 bits
 	 (hence the 3), starting at bit 2 for D0 (hence the 2)
 	 with 4 bits between for each watchpoint (yes, the 4).  */
-      if (!(bp_ctrl & (0x3 << (2 + (bp * 4))))) 
+      if (!(bp_ctrl & (0x3 << (2 + (bp * 4)))))
 	break;
     }
-    
+
   if (bp > 5)
     {
       /* We're out of watchpoints.  */
@@ -195,15 +195,15 @@ cris_insert_watchpoint (char type, CORE_ADDR addr, int len)
       /* Trigger on read.  */
       bp_ctrl |= (1 << (2 + bp * 4));
     }
-  if (type == '2' || type == '4') 
+  if (type == '2' || type == '4')
     {
       /* Trigger on write.  */
       bp_ctrl |= (2 << (2 + bp * 4));
     }
-  
+
   /* Setup the configuration register.  */
   supply_register_by_name ("s0", &bp_ctrl);
-  
+
   /* Setup the range.  */
   start = addr;
   end = addr + len - 1;
@@ -225,7 +225,7 @@ cris_remove_watchpoint (char type, CORE_ADDR addr, int len)
   int bp;
   unsigned long bp_ctrl;
   unsigned long start, end;
-  
+
   /* Breakpoint/watchpoint types:
      0 = memory breakpoint for instructions
      (not supported; done via memory write instead)
@@ -235,18 +235,18 @@ cris_remove_watchpoint (char type, CORE_ADDR addr, int len)
      4 = access watchpoint (supported).  */
   if (type < '2' || type > '4')
     return -1;
-  
+
   /* Read watchpoints are set as access watchpoints, because of GDB's
      inability to deal with pure read watchpoints.  */
   if (type == '3')
     type = '4';
-  
+
   /* Get the configuration register.  */
   collect_register_by_name ("s0", &bp_ctrl);
 
   /* Try to find a watchpoint that is configured for the
      specified range, then check that read/write also matches.  */
-  
+
   /* Ugly pointer arithmetic, since I cannot rely on a
      single switch (addr) as there may be several watchpoints with
      the same start address for example.  */
@@ -267,19 +267,19 @@ cris_remove_watchpoint (char type, CORE_ADDR addr, int len)
   collect_register_by_name ("s13", &bp_d_regs[10]);
   collect_register_by_name ("s14", &bp_d_regs[11]);
 
-  for (bp = 0; bp < 6; bp++) 
+  for (bp = 0; bp < 6; bp++)
     {
-      if (bp_d_regs[bp * 2] == addr 
+      if (bp_d_regs[bp * 2] == addr
 	  && bp_d_regs[bp * 2 + 1] == (addr + len - 1)) {
 	/* Matching range.  */
 	int bitpos = 2 + bp * 4;
 	int rw_bits;
-      
+
 	/* Read/write bits for this BP.  */
 	rw_bits = (bp_ctrl & (0x3 << bitpos)) >> bitpos;
-      
+
 	if ((type == '3' && rw_bits == 0x1)
-	    || (type == '2' && rw_bits == 0x2) 
+	    || (type == '2' && rw_bits == 0x2)
 	    || (type == '4' && rw_bits == 0x3))
 	  {
 	    /* Read/write matched.  */
@@ -287,13 +287,13 @@ cris_remove_watchpoint (char type, CORE_ADDR addr, int len)
 	  }
       }
     }
-    
+
   if (bp > 5)
     {
       /* No watchpoint matched.  */
       return -1;
     }
-    
+
   /* Found a matching watchpoint.  Now, deconfigure it by
      both disabling read/write in bp_ctrl and zeroing its
      start/end addresses.  */