Add x86 AVX support to gdbserver.

2010-04-07  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in (clean): Updated.
	(i386-avx.o): New.
	(i386-avx.c): Likewise.
	(i386-avx-linux.o): Likewise.
	(i386-avx-linux.c): Likewise.
	(amd64-avx.o): Likewise.
	(amd64-avx.c): Likewise.
	(amd64-avx-linux.o): Likewise.
	(amd64-avx-linux.c): Likewise.

	* configure.srv (srv_i386_regobj): Add i386-avx.o.
	(srv_i386_linux_regobj): Add i386-avx-linux.o.
	(srv_amd64_regobj): Add amd64-avx.o.
	(srv_amd64_linux_regobj): Add amd64-avx-linux.o.
	(srv_i386_32bit_xmlfiles): Add i386/32bit-avx.xml.
	(srv_i386_64bit_xmlfiles): Add i386/64bit-avx.xml.
	(srv_i386_xmlfiles): Add i386/i386-avx.xml.
	(srv_amd64_xmlfiles): Add i386/amd64-avx.xml.
	(srv_i386_linux_xmlfiles): Add i386/i386-avx-linux.xml.
	(srv_amd64_linux_xmlfiles): Add i386/amd64-avx-linux.xml.

	* i387-fp.c: Include "i386-xstate.h".
	(i387_xsave): New.
	(i387_cache_to_xsave): Likewise.
	(i387_xsave_to_cache): Likewise.
	(x86_xcr0): Likewise.

	* i387-fp.h (i387_cache_to_xsave): Likewise.
	(i387_xsave_to_cache): Likewise.
	(x86_xcr0): Likewise.

	* linux-arm-low.c (target_regsets): Initialize nt_type to 0.
	* linux-crisv32-low.c (target_regsets): Likewise.
	* linux-m68k-low.c (target_regsets): Likewise.
	* linux-mips-low.c (target_regsets): Likewise.
	* linux-ppc-low.c (target_regsets): Likewise.
	* linux-s390-low.c (target_regsets): Likewise.
	* linux-sh-low.c (target_regsets): Likewise.
	* linux-sparc-low.c (target_regsets): Likewise.
	* linux-xtensa-low.c (target_regsets): Likewise.

	* linux-low.c: Include <sys/uio.h>.
	(regsets_fetch_inferior_registers): Support nt_type.
	(regsets_store_inferior_registers): Likewise.
	(linux_process_qsupported): New.
	(linux_target_ops): Add linux_process_qsupported.

	* linux-low.h (regset_info): Add nt_type.
	(linux_target_ops): Add process_qsupported.

	* linux-x86-low.c: Include "i386-xstate.h", "elf/common.h"
	and <sys/uio.h>.
	(init_registers_i386_avx_linux): New.
	(init_registers_amd64_avx_linux): Likewise.
	(xmltarget_i386_linux_no_xml): Likewise.
	(xmltarget_amd64_linux_no_xml): Likewise.
	(PTRACE_GETREGSET): Likewise.
	(PTRACE_SETREGSET): Likewise.
	(x86_fill_xstateregset): Likewise.
	(x86_store_xstateregset): Likewise.
	(use_xml): Likewise.
	(x86_linux_update_xmltarget): Likewise.
	(x86_linux_process_qsupported): Likewise.
	(target_regsets): Add NT_X86_XSTATE entry and Initialize nt_type.
	(x86_arch_setup): Don't call init_registers_amd64_linux nor
	init_registers_i386_linux here.  Call
	x86_linux_update_xmltarget.
	(the_low_target): Add x86_linux_process_qsupported.

	* server.c (handle_query): Call target_process_qsupported.

	* target.h (target_ops): Add process_qsupported.
	(target_process_qsupported): New.

1 files changed, 267 insertions, 0 deletions

diff --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c
index 7ef4ba3..5461022 100644
--- a/gdb/gdbserver/i387-fp.c
+++ b/gdb/gdbserver/i387-fp.c
@@ -19,6 +19,7 @@
 
 #include "server.h"
 #include "i387-fp.h"
+#include "i386-xstate.h"
 
 int num_xmm_registers = 8;
 
@@ -72,6 +73,46 @@ struct i387_fxsave {
   unsigned char xmm_space[256];
 };
 
+struct i387_xsave {
+  /* All these are only sixteen bits, plus padding, except for fop (which
+     is only eleven bits), and fooff / fioff (which are 32 bits each).  */
+  unsigned short fctrl;
+  unsigned short fstat;
+  unsigned short ftag;
+  unsigned short fop;
+  unsigned int fioff;
+  unsigned short fiseg;
+  unsigned short pad1;
+  unsigned int fooff;
+  unsigned short foseg;
+  unsigned short pad12;
+
+  unsigned int mxcsr;
+  unsigned int mxcsr_mask;
+
+  /* Space for eight 80-bit FP values in 128-bit spaces.  */
+  unsigned char st_space[128];
+
+  /* Space for eight 128-bit XMM values, or 16 on x86-64.  */
+  unsigned char xmm_space[256];
+
+  unsigned char reserved1[48];
+
+  /* The extended control register 0 (the XFEATURE_ENABLED_MASK
+     register).  */
+  unsigned long long xcr0;
+
+  unsigned char reserved2[40];
+
+  /* The XSTATE_BV bit vector.  */
+  unsigned long long xstate_bv;
+
+  unsigned char reserved3[56];
+
+  /* Space for eight upper 128-bit YMM values, or 16 on x86-64.  */
+  unsigned char ymmh_space[256];
+};
+
 void
 i387_cache_to_fsave (struct regcache *regcache, void *buf)
 {
@@ -199,6 +240,128 @@ i387_cache_to_fxsave (struct regcache *regcache, void *buf)
   fp->foseg = val;
 }
 
+void
+i387_cache_to_xsave (struct regcache *regcache, void *buf)
+{
+  struct i387_xsave *fp = (struct i387_xsave *) buf;
+  int i;
+  unsigned long val, val2;
+  unsigned int clear_bv;
+  unsigned long long xstate_bv = 0;
+  char raw[16];
+  char *p;
+
+  /* The supported bits in `xstat_bv' are 1 byte.  Clear part in
+     vector registers if its bit in xstat_bv is zero.  */
+  clear_bv = (~fp->xstate_bv) & x86_xcr0;
+
+  /* Clear part in x87 and vector registers if its bit in xstat_bv is
+     zero.  */
+  if (clear_bv)
+    {
+      if ((clear_bv & I386_XSTATE_X87))
+	for (i = 0; i < 8; i++)
+	  memset (((char *) &fp->st_space[0]) + i * 16, 0, 10);
+
+      if ((clear_bv & I386_XSTATE_SSE))
+	for (i = 0; i < num_xmm_registers; i++) 
+	  memset (((char *) &fp->xmm_space[0]) + i * 16, 0, 16);
+
+      if ((clear_bv & I386_XSTATE_AVX))
+	for (i = 0; i < num_xmm_registers; i++) 
+	  memset (((char *) &fp->ymmh_space[0]) + i * 16, 0, 16);
+    }
+
+  /* Check if any x87 registers are changed.  */
+  if ((x86_xcr0 & I386_XSTATE_X87))
+    {
+      int st0_regnum = find_regno ("st0");
+
+      for (i = 0; i < 8; i++)
+	{
+	  collect_register (regcache, i + st0_regnum, raw);
+	  p = ((char *) &fp->st_space[0]) + i * 16;
+	  if (memcmp (raw, p, 10))
+	    {
+	      xstate_bv |= I386_XSTATE_X87;
+	      memcpy (p, raw, 10);
+	    }
+	}
+    }
+
+  /* Check if any SSE registers are changed.  */
+  if ((x86_xcr0 & I386_XSTATE_SSE))
+    {
+      int xmm0_regnum = find_regno ("xmm0");
+
+      for (i = 0; i < num_xmm_registers; i++) 
+	{
+	  collect_register (regcache, i + xmm0_regnum, raw);
+	  p = ((char *) &fp->xmm_space[0]) + i * 16;
+	  if (memcmp (raw, p, 16))
+	    {
+	      xstate_bv |= I386_XSTATE_SSE;
+	      memcpy (p, raw, 16);
+	    }
+	}
+    }
+
+  /* Check if any AVX registers are changed.  */
+  if ((x86_xcr0 & I386_XSTATE_AVX))
+    {
+      int ymm0h_regnum = find_regno ("ymm0h");
+
+      for (i = 0; i < num_xmm_registers; i++) 
+	{
+	  collect_register (regcache, i + ymm0h_regnum, raw);
+	  p = ((char *) &fp->ymmh_space[0]) + i * 16;
+	  if (memcmp (raw, p, 16))
+	    {
+	      xstate_bv |= I386_XSTATE_AVX;
+	      memcpy (p, raw, 16);
+	    }
+	}
+    }
+
+  /* Update the corresponding bits in xstate_bv if any SSE/AVX
+     registers are changed.  */
+  fp->xstate_bv |= xstate_bv;
+
+  collect_register_by_name (regcache, "fioff", &fp->fioff);
+  collect_register_by_name (regcache, "fooff", &fp->fooff);
+  collect_register_by_name (regcache, "mxcsr", &fp->mxcsr);
+
+  /* This one's 11 bits... */
+  collect_register_by_name (regcache, "fop", &val2);
+  fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800);
+
+  /* Some registers are 16-bit.  */
+  collect_register_by_name (regcache, "fctrl", &val);
+  fp->fctrl = val;
+
+  collect_register_by_name (regcache, "fstat", &val);
+  fp->fstat = val;
+
+  /* Convert to the simplifed tag form stored in fxsave data.  */
+  collect_register_by_name (regcache, "ftag", &val);
+  val &= 0xFFFF;
+  val2 = 0;
+  for (i = 7; i >= 0; i--)
+    {
+      int tag = (val >> (i * 2)) & 3;
+
+      if (tag != 3)
+	val2 |= (1 << i);
+    }
+  fp->ftag = val2;
+
+  collect_register_by_name (regcache, "fiseg", &val);
+  fp->fiseg = val;
+
+  collect_register_by_name (regcache, "foseg", &val);
+  fp->foseg = val;
+}
+
 static int
 i387_ftag (struct i387_fxsave *fp, int regno)
 {
@@ -296,3 +459,107 @@ i387_fxsave_to_cache (struct regcache *regcache, const void *buf)
   val = (fp->fop) & 0x7FF;
   supply_register_by_name (regcache, "fop", &val);
 }
+
+void
+i387_xsave_to_cache (struct regcache *regcache, const void *buf)
+{
+  struct i387_xsave *fp = (struct i387_xsave *) buf;
+  struct i387_fxsave *fxp = (struct i387_fxsave *) buf;
+  int i, top;
+  unsigned long val;
+  unsigned int clear_bv;
+  char *p;
+
+  /* The supported bits in `xstat_bv' are 1 byte.  Clear part in
+     vector registers if its bit in xstat_bv is zero.  */
+  clear_bv = (~fp->xstate_bv) & x86_xcr0;
+
+  /* Check if any x87 registers are changed.  */
+  if ((x86_xcr0 & I386_XSTATE_X87))
+    {
+      int st0_regnum = find_regno ("st0");
+
+      if ((clear_bv & I386_XSTATE_X87))
+	p = NULL;
+      else
+	p = (char *) buf;
+
+      for (i = 0; i < 8; i++)
+	{
+	  if (p)
+	    p = ((char *) &fp->st_space[0]) + i * 16;
+	  supply_register (regcache, i + st0_regnum, p);
+	}
+    }
+
+  if ((x86_xcr0 & I386_XSTATE_SSE))
+    {
+      int xmm0_regnum = find_regno ("xmm0");
+
+      if ((clear_bv & I386_XSTATE_SSE))
+	p = NULL;
+      else
+	p = (char *) buf;
+
+      for (i = 0; i < num_xmm_registers; i++)
+	{
+	  if (p)
+	    p = ((char *) &fp->xmm_space[0]) + i * 16;
+	  supply_register (regcache, i + xmm0_regnum, p);
+	}
+    }
+
+  if ((x86_xcr0 & I386_XSTATE_AVX))
+    {
+      int ymm0h_regnum = find_regno ("ymm0h");
+
+      if ((clear_bv & I386_XSTATE_AVX))
+	p = NULL;
+      else
+	p = (char *) buf;
+
+      for (i = 0; i < num_xmm_registers; i++)
+	{
+	  if (p)
+	    p = ((char *) &fp->ymmh_space[0]) + i * 16;
+	  supply_register (regcache, i + ymm0h_regnum, p);
+	}
+    }
+
+  supply_register_by_name (regcache, "fioff", &fp->fioff);
+  supply_register_by_name (regcache, "fooff", &fp->fooff);
+  supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
+
+  /* Some registers are 16-bit.  */
+  val = fp->fctrl & 0xFFFF;
+  supply_register_by_name (regcache, "fctrl", &val);
+
+  val = fp->fstat & 0xFFFF;
+  supply_register_by_name (regcache, "fstat", &val);
+
+  /* Generate the form of ftag data that GDB expects.  */
+  top = (fp->fstat >> 11) & 0x7;
+  val = 0;
+  for (i = 7; i >= 0; i--)
+    {
+      int tag;
+      if (fp->ftag & (1 << i))
+	tag = i387_ftag (fxp, (i + 8 - top) % 8);
+      else
+	tag = 3;
+      val |= tag << (2 * i);
+    }
+  supply_register_by_name (regcache, "ftag", &val);
+
+  val = fp->fiseg & 0xFFFF;
+  supply_register_by_name (regcache, "fiseg", &val);
+
+  val = fp->foseg & 0xFFFF;
+  supply_register_by_name (regcache, "foseg", &val);
+
+  val = (fp->fop) & 0x7FF;
+  supply_register_by_name (regcache, "fop", &val);
+}
+
+/* Default to SSE.  */
+unsigned long long x86_xcr0 = I386_XSTATE_SSE_MASK;