Add basic support for AArch64.

        * Makefile.in (ALL_64_TARGET_OBS): Add arch64-tdep.o.
        (HFILES_NO_SRCDIR): Add aarch64-tdep.h.
        (ALLDEPFILES): Add aarch64-tdep.c.
        * aarch64-tdep.c: New file.
        * aarch64-tdep.h: New file.
        * configure.tgt: Add AArch64.
        * features/Makefile (WHICH): Add aarch64 and aarch64-without-fpu.
        (aarch64-expedite): New definition.
        * features/aarch64-core.xml: New file.
        * features/aarch64-fpu.xml: New file.
        * features/aarch64-without-fpu.c: New file (generated).
        * features/aarch64-without-fpu.xml: New file.
        * features/aarch64.c: New file (generated).
        * features/aarch64.xml: New file.
        * regformats/aarch64-without-fpu.dat: New file (generated).
        * regformats/aarch64.dat: New file (generated).

7 files changed, 390 insertions, 1 deletions

diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index b17a5f4..4ba5cc3 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -30,7 +30,8 @@
 # in the GDB repository.  To generate C files:
 #   make GDB=/path/to/gdb XMLTOC="xml files" cfiles
 
-WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
+WHICH = aarch64 aarch64-without-fpu \
+	arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
 	arm-with-m arm-with-m-fpa-layout arm-with-m-vfp-d16 \
 	i386/i386 i386/i386-linux \
 	i386/i386-mmx i386/i386-mmx-linux \
@@ -52,6 +53,7 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
 	tic6x-c64xp-linux tic6x-c64x-linux tic6x-c62x-linux
 
 # Record which registers should be sent to GDB by default after stop.
+aarch64-expedite = x29,sp,pc
 arm-expedite = r11,sp,pc
 i386/i386-expedite = ebp,esp,eip
 i386/i386-linux-expedite = ebp,esp,eip
diff --git a/gdb/features/aarch64-core.xml b/gdb/features/aarch64-core.xml
new file mode 100644
index 0000000..53c63b2
--- /dev/null
+++ b/gdb/features/aarch64-core.xml
@@ -0,0 +1,46 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009-2013 Free Software Foundation, Inc.
+     Contributed by ARM Ltd.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.aarch64.core">
+  <reg name="x0" bitsize="64"/>
+  <reg name="x1" bitsize="64"/>
+  <reg name="x2" bitsize="64"/>
+  <reg name="x3" bitsize="64"/>
+  <reg name="x4" bitsize="64"/>
+  <reg name="x5" bitsize="64"/>
+  <reg name="x6" bitsize="64"/>
+  <reg name="x7" bitsize="64"/>
+  <reg name="x8" bitsize="64"/>
+  <reg name="x9" bitsize="64"/>
+  <reg name="x10" bitsize="64"/>
+  <reg name="x11" bitsize="64"/>
+  <reg name="x12" bitsize="64"/>
+  <reg name="x13" bitsize="64"/>
+  <reg name="x14" bitsize="64"/>
+  <reg name="x15" bitsize="64"/>
+  <reg name="x16" bitsize="64"/>
+  <reg name="x17" bitsize="64"/>
+  <reg name="x18" bitsize="64"/>
+  <reg name="x19" bitsize="64"/>
+  <reg name="x20" bitsize="64"/>
+  <reg name="x21" bitsize="64"/>
+  <reg name="x22" bitsize="64"/>
+  <reg name="x23" bitsize="64"/>
+  <reg name="x24" bitsize="64"/>
+  <reg name="x25" bitsize="64"/>
+  <reg name="x26" bitsize="64"/>
+  <reg name="x27" bitsize="64"/>
+  <reg name="x28" bitsize="64"/>
+  <reg name="x29" bitsize="64"/>
+  <reg name="x30" bitsize="64"/>
+  <reg name="sp" bitsize="64" type="data_ptr"/>
+
+  <reg name="pc" bitsize="64" type="code_ptr"/>
+  <reg name="cpsr" bitsize="32"/>
+</feature>
diff --git a/gdb/features/aarch64-fpu.xml b/gdb/features/aarch64-fpu.xml
new file mode 100644
index 0000000..abdfeb9
--- /dev/null
+++ b/gdb/features/aarch64-fpu.xml
@@ -0,0 +1,86 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009-2013 Free Software Foundation, Inc.
+     Contributed by ARM Ltd.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.aarch64.fpu">
+  <vector id="v2d" type="ieee_double" count="2"/>
+  <vector id="v2u" type="uint64" count="2"/>
+  <vector id="v2i" type="int64" count="2"/>
+  <vector id="v4f" type="ieee_single" count="4"/>
+  <vector id="v4u" type="uint32" count="4"/>
+  <vector id="v4i" type="int32" count="4"/>
+  <vector id="v8u" type="uint16" count="8"/>
+  <vector id="v8i" type="int16" count="8"/>
+  <vector id="v16u" type="uint8" count="16"/>
+  <vector id="v16i" type="int8" count="16"/>
+  <vector id="v1u" type="uint128" count="1"/>
+  <vector id="v1i" type="int128" count="1"/>
+  <union id="vnd">
+    <field name="f" type="v2d"/>
+    <field name="u" type="v2u"/>
+    <field name="s" type="v2i"/>
+  </union>
+  <union id="vns">
+    <field name="f" type="v4f"/>
+    <field name="u" type="v4u"/>
+    <field name="s" type="v4i"/>
+  </union>
+  <union id="vnh">
+    <field name="u" type="v8u"/>
+    <field name="s" type="v8i"/>
+  </union>
+  <union id="vnb">
+    <field name="u" type="v16u"/>
+    <field name="s" type="v16i"/>
+  </union>
+  <union id="vnq">
+    <field name="u" type="v1u"/>
+    <field name="s" type="v1i"/>
+  </union>
+  <union id="aarch64v">
+    <field name="d" type="vnd"/>
+    <field name="s" type="vns"/>
+    <field name="h" type="vnh"/>
+    <field name="b" type="vnb"/>
+    <field name="q" type="vnq"/>
+  </union>
+  <reg name="v0" bitsize="128" type="aarch64v" regnum="34"/>
+  <reg name="v1" bitsize="128" type="aarch64v" />
+  <reg name="v2" bitsize="128" type="aarch64v" />
+  <reg name="v3" bitsize="128" type="aarch64v" />
+  <reg name="v4" bitsize="128" type="aarch64v" />
+  <reg name="v5" bitsize="128" type="aarch64v" />
+  <reg name="v6" bitsize="128" type="aarch64v" />
+  <reg name="v7" bitsize="128" type="aarch64v" />
+  <reg name="v8" bitsize="128" type="aarch64v" />
+  <reg name="v9" bitsize="128" type="aarch64v" />
+  <reg name="v10" bitsize="128" type="aarch64v"/>
+  <reg name="v11" bitsize="128" type="aarch64v"/>
+  <reg name="v12" bitsize="128" type="aarch64v"/>
+  <reg name="v13" bitsize="128" type="aarch64v"/>
+  <reg name="v14" bitsize="128" type="aarch64v"/>
+  <reg name="v15" bitsize="128" type="aarch64v"/>
+  <reg name="v16" bitsize="128" type="aarch64v"/>
+  <reg name="v17" bitsize="128" type="aarch64v"/>
+  <reg name="v18" bitsize="128" type="aarch64v"/>
+  <reg name="v19" bitsize="128" type="aarch64v"/>
+  <reg name="v20" bitsize="128" type="aarch64v"/>
+  <reg name="v21" bitsize="128" type="aarch64v"/>
+  <reg name="v22" bitsize="128" type="aarch64v"/>
+  <reg name="v23" bitsize="128" type="aarch64v"/>
+  <reg name="v24" bitsize="128" type="aarch64v"/>
+  <reg name="v25" bitsize="128" type="aarch64v"/>
+  <reg name="v26" bitsize="128" type="aarch64v"/>
+  <reg name="v27" bitsize="128" type="aarch64v"/>
+  <reg name="v28" bitsize="128" type="aarch64v"/>
+  <reg name="v29" bitsize="128" type="aarch64v"/>
+  <reg name="v30" bitsize="128" type="aarch64v"/>
+  <reg name="v31" bitsize="128" type="aarch64v"/>
+  <reg name="fpsr" bitsize="32"/>
+  <reg name="fpcr" bitsize="32"/>
+</feature>
diff --git a/gdb/features/aarch64-without-fpu.c b/gdb/features/aarch64-without-fpu.c
new file mode 100644
index 0000000..dd1b029
--- /dev/null
+++ b/gdb/features/aarch64-without-fpu.c
@@ -0,0 +1,54 @@
+/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
+  Original: aarch64-without-fpu.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_aarch64_without_fpu;
+static void
+initialize_tdesc_aarch64_without_fpu (void)
+{
+  struct target_desc *result = allocate_target_description ();
+  struct tdesc_feature *feature;
+
+  set_tdesc_architecture (result, bfd_scan_arch ("aarch64"));
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.aarch64.core");
+  tdesc_create_reg (feature, "x0", 0, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x1", 1, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x2", 2, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x3", 3, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x4", 4, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x5", 5, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x6", 6, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x7", 7, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x8", 8, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x9", 9, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x10", 10, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x11", 11, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x12", 12, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x13", 13, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x14", 14, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x15", 15, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x16", 16, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x17", 17, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x18", 18, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x19", 19, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x20", 20, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x21", 21, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x22", 22, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x23", 23, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x24", 24, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x25", 25, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x26", 26, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x27", 27, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x28", 28, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x29", 29, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x30", 30, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "sp", 31, 1, NULL, 64, "data_ptr");
+  tdesc_create_reg (feature, "pc", 32, 1, NULL, 64, "code_ptr");
+  tdesc_create_reg (feature, "cpsr", 33, 1, NULL, 32, "int");
+
+  tdesc_aarch64_without_fpu = result;
+}
diff --git a/gdb/features/aarch64-without-fpu.xml b/gdb/features/aarch64-without-fpu.xml
new file mode 100644
index 0000000..33b9145
--- /dev/null
+++ b/gdb/features/aarch64-without-fpu.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009-2013 Free Software Foundation, Inc.
+     Contributed by ARM Ltd.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+  <architecture>aarch64</architecture>
+  <xi:include href="aarch64-core.xml"/>
+</target>
diff --git a/gdb/features/aarch64.c b/gdb/features/aarch64.c
new file mode 100644
index 0000000..1e9a99d
--- /dev/null
+++ b/gdb/features/aarch64.c
@@ -0,0 +1,174 @@
+/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
+  Original: aarch64.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_aarch64;
+static void
+initialize_tdesc_aarch64 (void)
+{
+  struct target_desc *result = allocate_target_description ();
+  struct tdesc_feature *feature;
+  struct tdesc_type *field_type;
+  struct tdesc_type *type;
+
+  set_tdesc_architecture (result, bfd_scan_arch ("aarch64"));
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.aarch64.core");
+  tdesc_create_reg (feature, "x0", 0, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x1", 1, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x2", 2, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x3", 3, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x4", 4, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x5", 5, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x6", 6, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x7", 7, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x8", 8, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x9", 9, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x10", 10, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x11", 11, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x12", 12, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x13", 13, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x14", 14, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x15", 15, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x16", 16, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x17", 17, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x18", 18, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x19", 19, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x20", 20, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x21", 21, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x22", 22, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x23", 23, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x24", 24, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x25", 25, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x26", 26, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x27", 27, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x28", 28, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x29", 29, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "x30", 30, 1, NULL, 64, "int");
+  tdesc_create_reg (feature, "sp", 31, 1, NULL, 64, "data_ptr");
+  tdesc_create_reg (feature, "pc", 32, 1, NULL, 64, "code_ptr");
+  tdesc_create_reg (feature, "cpsr", 33, 1, NULL, 32, "int");
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.aarch64.fpu");
+  field_type = tdesc_named_type (feature, "ieee_double");
+  tdesc_create_vector (feature, "v2d", field_type, 2);
+
+  field_type = tdesc_named_type (feature, "uint64");
+  tdesc_create_vector (feature, "v2u", field_type, 2);
+
+  field_type = tdesc_named_type (feature, "int64");
+  tdesc_create_vector (feature, "v2i", field_type, 2);
+
+  field_type = tdesc_named_type (feature, "ieee_single");
+  tdesc_create_vector (feature, "v4f", field_type, 4);
+
+  field_type = tdesc_named_type (feature, "uint32");
+  tdesc_create_vector (feature, "v4u", field_type, 4);
+
+  field_type = tdesc_named_type (feature, "int32");
+  tdesc_create_vector (feature, "v4i", field_type, 4);
+
+  field_type = tdesc_named_type (feature, "uint16");
+  tdesc_create_vector (feature, "v8u", field_type, 8);
+
+  field_type = tdesc_named_type (feature, "int16");
+  tdesc_create_vector (feature, "v8i", field_type, 8);
+
+  field_type = tdesc_named_type (feature, "uint8");
+  tdesc_create_vector (feature, "v16u", field_type, 16);
+
+  field_type = tdesc_named_type (feature, "int8");
+  tdesc_create_vector (feature, "v16i", field_type, 16);
+
+  field_type = tdesc_named_type (feature, "uint128");
+  tdesc_create_vector (feature, "v1u", field_type, 1);
+
+  field_type = tdesc_named_type (feature, "int128");
+  tdesc_create_vector (feature, "v1i", field_type, 1);
+
+  type = tdesc_create_union (feature, "vnd");
+  field_type = tdesc_named_type (feature, "v2d");
+  tdesc_add_field (type, "f", field_type);
+  field_type = tdesc_named_type (feature, "v2u");
+  tdesc_add_field (type, "u", field_type);
+  field_type = tdesc_named_type (feature, "v2i");
+  tdesc_add_field (type, "s", field_type);
+
+  type = tdesc_create_union (feature, "vns");
+  field_type = tdesc_named_type (feature, "v4f");
+  tdesc_add_field (type, "f", field_type);
+  field_type = tdesc_named_type (feature, "v4u");
+  tdesc_add_field (type, "u", field_type);
+  field_type = tdesc_named_type (feature, "v4i");
+  tdesc_add_field (type, "s", field_type);
+
+  type = tdesc_create_union (feature, "vnh");
+  field_type = tdesc_named_type (feature, "v8u");
+  tdesc_add_field (type, "u", field_type);
+  field_type = tdesc_named_type (feature, "v8i");
+  tdesc_add_field (type, "s", field_type);
+
+  type = tdesc_create_union (feature, "vnb");
+  field_type = tdesc_named_type (feature, "v16u");
+  tdesc_add_field (type, "u", field_type);
+  field_type = tdesc_named_type (feature, "v16i");
+  tdesc_add_field (type, "s", field_type);
+
+  type = tdesc_create_union (feature, "vnq");
+  field_type = tdesc_named_type (feature, "v1u");
+  tdesc_add_field (type, "u", field_type);
+  field_type = tdesc_named_type (feature, "v1i");
+  tdesc_add_field (type, "s", field_type);
+
+  type = tdesc_create_union (feature, "aarch64v");
+  field_type = tdesc_named_type (feature, "vnd");
+  tdesc_add_field (type, "d", field_type);
+  field_type = tdesc_named_type (feature, "vns");
+  tdesc_add_field (type, "s", field_type);
+  field_type = tdesc_named_type (feature, "vnh");
+  tdesc_add_field (type, "h", field_type);
+  field_type = tdesc_named_type (feature, "vnb");
+  tdesc_add_field (type, "b", field_type);
+  field_type = tdesc_named_type (feature, "vnq");
+  tdesc_add_field (type, "q", field_type);
+
+  tdesc_create_reg (feature, "v0", 34, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v1", 35, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v2", 36, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v3", 37, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v4", 38, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v5", 39, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v6", 40, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v7", 41, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v8", 42, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v9", 43, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v10", 44, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v11", 45, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v12", 46, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v13", 47, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v14", 48, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v15", 49, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v16", 50, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v17", 51, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v18", 52, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v19", 53, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v20", 54, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v21", 55, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v22", 56, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v23", 57, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v24", 58, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v25", 59, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v26", 60, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v27", 61, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v28", 62, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v29", 63, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v30", 64, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "v31", 65, 1, NULL, 128, "aarch64v");
+  tdesc_create_reg (feature, "fpsr", 66, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "fpcr", 67, 1, NULL, 32, "int");
+
+  tdesc_aarch64 = result;
+}
diff --git a/gdb/features/aarch64.xml b/gdb/features/aarch64.xml
new file mode 100644
index 0000000..cfd5bf7
--- /dev/null
+++ b/gdb/features/aarch64.xml
@@ -0,0 +1,14 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2009-2013 Free Software Foundation, Inc.
+     Contributed by ARM Ltd.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+  <architecture>aarch64</architecture>
+  <xi:include href="aarch64-core.xml"/>
+  <xi:include href="aarch64-fpu.xml"/>
+</target>