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| author | Daniel Jacobowitz <drow@false.org> | 2007-10-15 19:27:25 +0000 |
|---|---|---|
| committer | Daniel Jacobowitz <drow@false.org> | 2007-10-15 19:27:25 +0000 |
| commit | 8dc35b87076f7ffa5370932e054f0336aa01f122 (patch) | |
| tree | 0fc5ce0e68c5b49f7ddeaefc7083975690930041 /gdb/features/rs6000/power-fpu.xml | |
| parent | 81adfcedc899da6e7641d2c2d6aad68f60d97735 (diff) | |
| download | gdb-8dc35b87076f7ffa5370932e054f0336aa01f122.zip gdb-8dc35b87076f7ffa5370932e054f0336aa01f122.tar.gz gdb-8dc35b87076f7ffa5370932e054f0336aa01f122.tar.bz2 | |
* features/rs6000/power-altivec.xml, features/rs6000/power-core.xml,
features/rs6000/power-fpu.xml, features/rs6000/power-oea.xml,
features/rs6000/power-spe.xml, features/rs6000/power64-core.xml: New
feature descriptions for standard PowerPC register sets.
* features/rs6000/powerpc-32.xml, features/rs6000/powerpc-403.xml,
features/rs6000/powerpc-403gc.xml, features/rs6000/powerpc-505.xml,
features/rs6000/powerpc-601.xml, features/rs6000/powerpc-602.xml,
features/rs6000/powerpc-603.xml, features/rs6000/powerpc-604.xml,
features/rs6000/powerpc-64.xml, features/rs6000/powerpc-7400.xml,
features/rs6000/powerpc-750.xml, features/rs6000/powerpc-860.xml,
features/rs6000/powerpc-e500.xml, features/rs6000/rs6000.xml: New
target descriptions for PowerPC processors.
Diffstat (limited to 'gdb/features/rs6000/power-fpu.xml')
| -rw-r--r-- | gdb/features/rs6000/power-fpu.xml | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/gdb/features/rs6000/power-fpu.xml b/gdb/features/rs6000/power-fpu.xml new file mode 100644 index 0000000..4605173 --- /dev/null +++ b/gdb/features/rs6000/power-fpu.xml @@ -0,0 +1,44 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2007 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.power.fpu"> + <reg name="f0" bitsize="64" type="ieee_double" regnum="32"/> + <reg name="f1" bitsize="64" type="ieee_double"/> + <reg name="f2" bitsize="64" type="ieee_double"/> + <reg name="f3" bitsize="64" type="ieee_double"/> + <reg name="f4" bitsize="64" type="ieee_double"/> + <reg name="f5" bitsize="64" type="ieee_double"/> + <reg name="f6" bitsize="64" type="ieee_double"/> + <reg name="f7" bitsize="64" type="ieee_double"/> + <reg name="f8" bitsize="64" type="ieee_double"/> + <reg name="f9" bitsize="64" type="ieee_double"/> + <reg name="f10" bitsize="64" type="ieee_double"/> + <reg name="f11" bitsize="64" type="ieee_double"/> + <reg name="f12" bitsize="64" type="ieee_double"/> + <reg name="f13" bitsize="64" type="ieee_double"/> + <reg name="f14" bitsize="64" type="ieee_double"/> + <reg name="f15" bitsize="64" type="ieee_double"/> + <reg name="f16" bitsize="64" type="ieee_double"/> + <reg name="f17" bitsize="64" type="ieee_double"/> + <reg name="f18" bitsize="64" type="ieee_double"/> + <reg name="f19" bitsize="64" type="ieee_double"/> + <reg name="f20" bitsize="64" type="ieee_double"/> + <reg name="f21" bitsize="64" type="ieee_double"/> + <reg name="f22" bitsize="64" type="ieee_double"/> + <reg name="f23" bitsize="64" type="ieee_double"/> + <reg name="f24" bitsize="64" type="ieee_double"/> + <reg name="f25" bitsize="64" type="ieee_double"/> + <reg name="f26" bitsize="64" type="ieee_double"/> + <reg name="f27" bitsize="64" type="ieee_double"/> + <reg name="f28" bitsize="64" type="ieee_double"/> + <reg name="f29" bitsize="64" type="ieee_double"/> + <reg name="f30" bitsize="64" type="ieee_double"/> + <reg name="f31" bitsize="64" type="ieee_double"/> + + <reg name="fpscr" bitsize="32" group="float" regnum="70"/> +</feature> |