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| author | Luis Machado <luisgpm@br.ibm.com> | 2008-08-18 15:46:08 +0000 |
|---|---|---|
| committer | Luis Machado <luisgpm@br.ibm.com> | 2008-08-18 15:46:08 +0000 |
| commit | 677c5bb1ab2a47e4d5169bdda40f6a49968d7b75 (patch) | |
| tree | 773fe6695a3afd9733becdc9d8e6644e6160175c /gdb/doc | |
| parent | 46a9b8ed1beaa6419e936f77a36aff19716ab12e (diff) | |
| download | gdb-677c5bb1ab2a47e4d5169bdda40f6a49968d7b75.zip gdb-677c5bb1ab2a47e4d5169bdda40f6a49968d7b75.tar.gz gdb-677c5bb1ab2a47e4d5169bdda40f6a49968d7b75.tar.bz2 | |
* doc/gdb.texinfo (PowerPC): Mention Extended FPR's for POWER7.
(PowerPC features): Mention feature set for VSX registers.
* gdbserver/Makefile.in: Add required vsx dependencies.
* gdbserver/linux-ppc-low: Define PPC_FEATURE_HAS_VSX.
Declare init_registers_powerpc_vsx32l.
Declare init_registers_powerpc_vsx64l.
Define PTRACE_GETVSXREGS and PTRACE_SETVSXREGS.
(ppc_arch_setup): Check for VSX in hwcap.
(ppc_fill_vsxregset): New function.
(ppc_store_vsxregset): New function.
Add new VSX entry in regset_info target_regsets.
* gdbserver/configure.srv: Add new VSX dependencies.
Diffstat (limited to 'gdb/doc')
| -rw-r--r-- | gdb/doc/ChangeLog | 5 | ||||
| -rw-r--r-- | gdb/doc/gdb.texinfo | 10 |
2 files changed, 15 insertions, 0 deletions
diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog index 999b2d2..cc8ef9b 100644 --- a/gdb/doc/ChangeLog +++ b/gdb/doc/ChangeLog @@ -1,3 +1,8 @@ +2008-08-18 Luis Machado <luisgpm@br.ibm.com> + + * doc/gdb.texinfo (PowerPC): Mention Extended FPR's for POWER7. + (PowerPC features): Mention feature set for VSX registers. + 2008-08-13 Joel Brobecker <brobecker@adacore.com> * gdb.texinfo (Ada Mode Intro): Improve the documentation regarding diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 1ef4c8a..61c2917 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -16427,6 +16427,9 @@ The pseudo-registers go from @code{$dl0} through @code{$dl15}, and are formed by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0}, @code{f2} and @code{f3} for @code{$dl1} and so on. +For POWER7 processors, @value{GDB} provides a set of pseudo-registers, the 64-bit +wide Extended Floating Point Registers (@samp{f32} through @samp{f63}). + @node Controlling GDB @chapter Controlling @value{GDBN} @@ -27865,6 +27868,13 @@ The @samp{org.gnu.gdb.power.altivec} feature is optional. It should contain registers @samp{vr0} through @samp{vr31}, @samp{vscr}, and @samp{vrsave}. +The @samp{org.gnu.gdb.power.vsx} feature is optional. It should +contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN} +will combine these registers with the floating point registers +(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0} +through @samp{vr31}} to present the 128-bit wide registers @samp{vs0} +through @samp{vs63}, the set of vector registers for POWER7. + The @samp{org.gnu.gdb.power.spe} feature is optional. It should contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and @samp{spefscr}. SPE targets should provide 32-bit registers in |