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author | Daniel Jacobowitz <drow@false.org> | 2007-06-13 18:27:00 +0000 |
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committer | Daniel Jacobowitz <drow@false.org> | 2007-06-13 18:27:00 +0000 |
commit | f8b73d13b7ca749dee450b60e4e401b4c096bed6 (patch) | |
tree | 6ecc1a4f231e32c4d57405f6c4173ce2d48d5fcf /gdb/doc | |
parent | 17a912b6825ef7feaad6d9b4f5419f045fe3c8d0 (diff) | |
download | gdb-f8b73d13b7ca749dee450b60e4e401b4c096bed6.zip gdb-f8b73d13b7ca749dee450b60e4e401b4c096bed6.tar.gz gdb-f8b73d13b7ca749dee450b60e4e401b4c096bed6.tar.bz2 |
* Makefile.in (mips-tdep.o): Update.
* mips-tdep.c (struct register_alias, mips_o32_aliases)
(mips_n32_n64_aliases, mips_register_aliases): New.
(mips_register_name): Call tdesc_register_name.
(mips_tdesc_register_reggroup_p): New.
(mips_pseudo_register_type, value_of_mips_user_reg): New.
(mips_gdbarch_init): Add target-described register support.
Register aliases for register names.
* target-descriptions.c (tdesc_register_name): Make global.
(tdesc_register_in_reggroup_p): New function, broken out from
tdesc_register_reggroup_p.
(tdesc_register_reggroup_p): Use it.
* target-descriptions.h (tdesc_register_name)
(tdesc_register_in_reggroup_p): New prototypes.
* NEWS: Correct formatting. Mention MIPS register support.
* features/mips-cp0.xml, features/mips-fpu.xml,
features/mips64-cp0.xml, gdb/features/mips64-fpu.xml, mips-cpu.xml,
features/mips64-cpu.xml: New files.
* gdb.xml/tdesc-regs.exp: Add MIPS support. Allow multiple
required features to be included.
* gdb.texinfo (MIPS Features): New subsection.
Diffstat (limited to 'gdb/doc')
-rw-r--r-- | gdb/doc/ChangeLog | 4 | ||||
-rw-r--r-- | gdb/doc/gdb.texinfo | 17 |
2 files changed, 21 insertions, 0 deletions
diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog index 7c1850d..20b2768 100644 --- a/gdb/doc/ChangeLog +++ b/gdb/doc/ChangeLog @@ -1,3 +1,7 @@ +2007-06-13 Daniel Jacobowitz <dan@codesourcery.com> + + * gdb.texinfo (MIPS Features): New subsection. + 2007-06-12 Ulrich Weigand <uweigand@de.ibm.com> Markus Deuling <deuling@de.ibm.com> diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 5a3b0a9..937106c 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -25767,6 +25767,23 @@ it should contain at least registers @samp{wR0} through @samp{wR15} and @samp{wCGR0} through @samp{wCGR3}. The @samp{wCID}, @samp{wCon}, @samp{wCSSF}, and @samp{wCASF} registers are optional. +@subsection MIPS Features +@cindex target descriptions, MIPS features + +The @samp{org.gnu.gdb.mips.cpu} feature is required for MIPS targets. +It should contain registers @samp{r0} through @samp{r31}, @samp{lo}, +@samp{hi}, and @samp{pc}. They may be 32-bit or 64-bit depending +on the target. + +The @samp{org.gnu.gdb.mips.cp0} feature is also required. It should +contain at least the @samp{status}, @samp{badvaddr}, and @samp{cause} +registers. They may be 32-bit or 64-bit depending on the target. + +The @samp{org.gnu.gdb.mips.fpu} feature is currently required, though +it may be optional in a future version of @value{GDBN}. It should +contain registers @samp{f0} through @samp{f31}, @samp{fcsr}, and +@samp{fir}. They may be 32-bit or 64-bit depending on the target. + @include gpl.texi @raisesections |