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| author | Shahab Vahedi <shahab@synopsys.com> | 2020-07-09 17:44:01 +0200 |
|---|---|---|
| committer | Shahab Vahedi <shahab@synopsys.com> | 2020-08-25 17:31:29 +0200 |
| commit | fdd8731bd137e55453b501fa5404b5e6f60ddea0 (patch) | |
| tree | 561a2381ea1468e6c1c4f838eef1447323eb9cfd /gdb/doc | |
| parent | 22459524998c672dc66fd0039d9f795dd6c7cbf9 (diff) | |
| download | gdb-fdd8731bd137e55453b501fa5404b5e6f60ddea0.zip gdb-fdd8731bd137e55453b501fa5404b5e6f60ddea0.tar.gz gdb-fdd8731bd137e55453b501fa5404b5e6f60ddea0.tar.bz2 | |
arc: Add hardware loop detection
For ARC there are registers that are not part of a required set in XML
target descriptions by default, but are almost always present on ARC
targets and are universally exposed by the ptrace interface. Hardware
loop registers being one of them.
LP_START and LP_END auxiliary registers are hardware loop start and end.
Formally, they are optional, but it is hard to find an ARC configuration
that doesn't have them. They are always present in processors that can
run GNU/Linux. GDB needs to know about those registers to implement
proper software single stepping, since they affect what instruction
will be next.
This commit adds the code to check for the existance of "lp_start" and
"lp_end" in XML target descriptions. If they exist, then the function
reports that the target supports hardware loops.
gdb/ChangeLog:
* arc-tdep.c (arc_check_for_hardware_loop): New.
* arc-tdep.h (gdbarch_tdep): New field has_hw_loops.
gdb/doc/ChangeLog:
* gdb.texinfo (Synopsys ARC): Document LP_START, LP_END and BTA.
Diffstat (limited to 'gdb/doc')
| -rw-r--r-- | gdb/doc/ChangeLog | 4 | ||||
| -rw-r--r-- | gdb/doc/gdb.texinfo | 11 |
2 files changed, 13 insertions, 2 deletions
diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog index 6a81351..badf7ae 100644 --- a/gdb/doc/ChangeLog +++ b/gdb/doc/ChangeLog @@ -1,5 +1,9 @@ 2020-08-25 Shahab Vahedi <shahab@synopsys.com> + * gdb.texinfo (Synopsys ARC): Document LP_START, LP_END and BTA. + +2020-08-25 Shahab Vahedi <shahab@synopsys.com> + * gdb.texinfo (Synopsys ARC): Update the documentation for ARC Features. diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index a4f5b78..77c5d89 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -45298,8 +45298,15 @@ Extension core registers @samp{r32} through @samp{r59} are optional and their existence depends on the configuration. When debugging GNU/Linux applications, i.e.@: user space debugging, these core registers are not available. -The @samp{org.gnu.gdb.arc.aux} feature is required for all ARC targets. It -should at least contain @samp{pc} and @samp{status32} registers. +The @samp{org.gnu.gdb.arc.aux} feature is required for all ARC targets. Here +is the list of registers pertinent to this feature: + +@itemize @minus +@item +mandatory: @samp{pc} and @samp{status32}. +@item +optional: @samp{lp_start}, @samp{lp_end}, and @samp{bta}. +@end itemize @node ARM Features @subsection ARM Features |