arc: Add ARCv2 XML target along with refactoring

A few changes have been made to make the register support simpler,
more flexible and extendible.  The trigger for most of these changes
are the remarks [1] made earlier for v2 of this patch.  The noticeable
improvements are:

- The arc XML target features are placed under gdb/features/arc
- There are two cores (based on ISA) and one auxiliary feature:
  v1-core: ARC600, ARC601, ARC700
  v2-core: ARC EM, ARC HS
  aux: common in both
- The XML target features represent a minimalistic sane set of
  registers irrespective of application (baremetal or linux).
- A concept of "feature" class has been introduced in the code.
  The "feature" object is constructed from BFD and GDBARCH data.
  It contains necessary information (ISA and register size) to
  determine which XML target feature to use.
- A new structure (ARC_REGISTER_FEATURE) is added that allows
  providing index, names, and the necessity of registers. This
  simplifies the sanity checks and future extendibility.
- Documnetation has been updated to reflect ARC features better.
- Although the feature names has changed, there still exists
  backward compatibility with older names through
  find_obsolete_[core,aux]_names() functions.

The last two points were inspired from RiscV port.

[1]
https://sourceware.org/pipermail/gdb-patches/2020-May/168511.html

gdb/ChangeLog:

	* arch/arc.h
	  (arc_gdbarch_features): New class to stir the selection of target XML.
	  (arc_create_target_description): Use FEATURES to choose XML target.
	  (arc_lookup_target_description): Use arc_create_target_description
	  to create _new_ target descriptions or return the already created
	  ones if the FEATURES is the same.
	* arch/arc.c: Implementation of prototypes described above.
	* gdb/arc-tdep.h (arc_regnum enum): Add more registers.
	  (arc_gdbarch_features_init): Initialize the FEATURES struct.
	* arc-tdep.c (*_feature_name): Make feature names consistent.
	  (arc_register_feature): A new struct to hold information about
	  registers of a particular target/feature.
	  (arc_check_tdesc_feature): Check if XML provides registers in
	  compliance with ARC_REGISTER_FEATURE structs.
	  (arc_update_acc_reg_names): Add aliases for r58 and r59.
	  (determine_*_reg_feature_set): Which feature name to look for.
	  (arc_gdbarch_features_init): Given MACH and ABFD, initialize FEATURES.
	  (mach_type_to_arc_isa): Convert from a set of binutils machine types
	  to expected ISA enums to be used in arc_gdbarch_features structs.
	* features/Makefile (FEATURE_XMLFILES): Add new files.
	* gdb/features/arc/v1-aux.c: New file.
	* gdb/features/arc/v1-aux.xml: Likewise.
	* gdb/features/arc/v1-core.c: Likewise.
	* gdb/features/arc/v1-core.xml: Likewise.
	* gdb/features/arc/v2-aux.c: Likewise.
	* gdb/features/arc/v2-aux.xml: Likewise.
	* gdb/features/arc/v2-core.c: Likewise.
	* gdb/features/arc/v2-core.xml: Likewise.
	* NEWS (Changes since GDB 9): Announce obsolence of old feature names.

gdb/doc/ChangeLog:

	* gdb.texinfo (Synopsys ARC): Update the documentation for ARC
	Features.

gdb/testsuite/ChangeLog:

	* gdb.arch/arc-tdesc-cpu.xml: Use new feature names.

2 files changed, 40 insertions, 34 deletions

diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog
index cddcdaa..6a81351 100644
--- a/gdb/doc/ChangeLog
+++ b/gdb/doc/ChangeLog
@@ -1,3 +1,8 @@
+2020-08-25  Shahab Vahedi  <shahab@synopsys.com>
+
+	* gdb.texinfo (Synopsys ARC): Update the documentation for ARC
+	Features.
+
 2020-08-07  Tom Tromey  <tromey@adacore.com>
 
 	* gdb.texinfo (Ravenscar Profile): Add examples.
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 7701364..a4f5b78 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -45265,40 +45265,41 @@ it should contain registers @samp{pauth_dmask} and @samp{pauth_cmask}.
 @subsection ARC Features
 @cindex target descriptions, ARC Features
 
-ARC processors are highly configurable, so even core registers and their number
-are not completely predetermined.  In addition flags and PC registers which are
-important to @value{GDBN} are not ``core'' registers in ARC.  It is required
-that one of the core registers features is present.
-@samp{org.gnu.gdb.arc.aux-minimal} feature is mandatory.
-
-The @samp{org.gnu.gdb.arc.core.v2} feature is required for ARC EM and ARC HS
-targets with a normal register file.  It should contain registers @samp{r0}
-through @samp{r25}, @samp{gp}, @samp{fp}, @samp{sp}, @samp{r30}, @samp{blink},
-@samp{lp_count} and @samp{pcl}.  This feature may contain register @samp{ilink}
-and any of extension core registers @samp{r32} through @samp{r59/acch}.
-@samp{ilink} and extension core registers are not available to read/write, when
-debugging GNU/Linux applications, thus @samp{ilink} is made optional.
-
-The @samp{org.gnu.gdb.arc.core-reduced.v2} feature is required for ARC EM and
-ARC HS targets with a reduced register file.  It should contain registers
-@samp{r0} through @samp{r3}, @samp{r10} through @samp{r15}, @samp{gp},
-@samp{fp}, @samp{sp}, @samp{r30}, @samp{blink}, @samp{lp_count} and @samp{pcl}.
-This feature may contain register @samp{ilink} and any of extension core
-registers @samp{r32} through @samp{r59/acch}.
-
-The @samp{org.gnu.gdb.arc.core.arcompact} feature is required for ARCompact
-targets with a normal register file.  It should contain registers @samp{r0}
-through @samp{r25}, @samp{gp}, @samp{fp}, @samp{sp}, @samp{r30}, @samp{blink},
-@samp{lp_count} and @samp{pcl}.  This feature may contain registers
-@samp{ilink1}, @samp{ilink2} and any of extension core registers @samp{r32}
-through @samp{r59/acch}.  @samp{ilink1} and @samp{ilink2} and extension core
-registers are not available when debugging GNU/Linux applications.  The only
-difference with @samp{org.gnu.gdb.arc.core.v2} feature is in the names of
-@samp{ilink1} and @samp{ilink2} registers and that @samp{r30} is mandatory in
-ARC v2, but @samp{ilink2} is optional on ARCompact.
-
-The @samp{org.gnu.gdb.arc.aux-minimal} feature is required for all ARC
-targets.  It should contain registers @samp{pc} and @samp{status32}.
+ARC processors are so configurable that even core registers and their numbers
+are not predetermined completely.  Moreover, @emph{flags} and @emph{PC}
+registers, which are important to @value{GDBN}, are not ``core'' registers in
+ARC.  Therefore, there are two features that their presence is mandatory:
+@samp{org.gnu.gdb.arc.core} and @samp{org.gnu.gdb.arc.aux}.
+
+The @samp{org.gnu.gdb.arc.core} feature is required for all targets.  It must
+contain registers:
+
+@itemize @minus
+@item
+@samp{r0} through @samp{r25} for normal register file targets.
+@item
+@samp{r0} through @samp{r3}, and @samp{r10} through @samp{r15} for reduced
+register file targets.
+@item
+@samp{gp}, @samp{fp}, @samp{sp}, @samp{r30}@footnote{Not necessary for ARCv1.},
+@samp{blink}, @samp{lp_count}, @samp{pcl}.
+@end itemize
+
+In case of an ARCompact target (ARCv1 ISA), the @samp{org.gnu.gdb.arc.core}
+feature may contain registers @samp{ilink1} and @samp{ilink2}.  While in case
+of ARC EM and ARC HS targets (ARCv2 ISA), register @samp{ilink} may be present.
+The difference between ARCv1 and ARCv2 is the naming of registers @emph{29th}
+and @emph{30th}.  They are called @samp{ilink1} and @samp{ilink2} for ARCv1 and
+are optional.  For ARCv2, they are called @samp{ilink} and @samp{r30} and only
+@samp{ilink} is optional.  The optionality of @samp{ilink*} registers is
+because of their inaccessibility during user space debugging sessions.
+
+Extension core registers @samp{r32} through @samp{r59} are optional and their
+existence depends on the configuration.  When debugging GNU/Linux applications,
+i.e.@: user space debugging, these core registers are not available.
+
+The @samp{org.gnu.gdb.arc.aux} feature is required for all ARC targets.  It
+should at least contain @samp{pc} and @samp{status32} registers.
 
 @node ARM Features
 @subsection ARM Features