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author | Jackie Smith Cashion <jsmith@redhat.com> | 2001-12-05 02:05:04 +0000 |
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committer | Jackie Smith Cashion <jsmith@redhat.com> | 2001-12-05 02:05:04 +0000 |
commit | 02da620696a4889e56061e9f9048c0624c8436eb (patch) | |
tree | 2194f6a7677aff6160cf530e8e80001acf01fa6e /gdb/d10v-tdep.c | |
parent | 7666f43c32c4d59bdf906d9ba4b0a471c0a11409 (diff) | |
download | gdb-02da620696a4889e56061e9f9048c0624c8436eb.zip gdb-02da620696a4889e56061e9f9048c0624c8436eb.tar.gz gdb-02da620696a4889e56061e9f9048c0624c8436eb.tar.bz2 |
2001-12-04 Jackie Smith Cashion <jsmith@redhat.com>
* MAINTAINERS (write-after-approval): Add self.
* d10v-tdep.c (d10v_gdbarch_init): Change size of long long to 8 bytes.
From Andrew Cagney <cagney@redhat.com>:
* d10v-tdep.c (d10v_frame_chain_valid): Check if the caller's PC
is in the entry function.
(d10v_use_struct_convention): Store multi-field struct and union
return values on the stack.
Diffstat (limited to 'gdb/d10v-tdep.c')
-rw-r--r-- | gdb/d10v-tdep.c | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/gdb/d10v-tdep.c b/gdb/d10v-tdep.c index fb4c635..fca2848 100644 --- a/gdb/d10v-tdep.c +++ b/gdb/d10v-tdep.c @@ -103,7 +103,9 @@ static void do_d10v_pop_frame (struct frame_info *fi); static int d10v_frame_chain_valid (CORE_ADDR chain, struct frame_info *frame) { - return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START); + return ((chain) != 0 && (frame) != 0 + && (frame)->pc > IMEM_START + && !inside_entry_file (FRAME_SAVED_PC (frame))); } static CORE_ADDR @@ -122,7 +124,31 @@ d10v_stack_align (CORE_ADDR len) static int d10v_use_struct_convention (int gcc_p, struct type *type) { - return (TYPE_LENGTH (type) > 8); + long alignment; + int i; + /* The d10v only passes a struct in a register when that structure + has an alignment that matches the size of a register. */ + /* If the structure doesn't fit in 4 registers, put it on the + stack. */ + if (TYPE_LENGTH (type) > 8) + return 1; + /* If the struct contains only one field, don't put it on the stack + - gcc can fit it in one or more registers. */ + if (TYPE_NFIELDS (type) == 1) + return 0; + alignment = TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)); + for (i = 1; i < TYPE_NFIELDS (type); i++) + { + /* If the alignment changes, just assume it goes on the + stack. */ + if (TYPE_LENGTH (TYPE_FIELD_TYPE (type, i)) != alignment) + return 1; + } + /* If the alignment is suitable for the d10v's 16 bit registers, + don't put it on the stack. */ + if (alignment == 2 || alignment == 4) + return 0; + return 1; } @@ -1498,7 +1524,7 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); - set_gdbarch_long_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); + set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long double'' is 64 bits. */ set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); |