gdb, gdbserver, gdbsupport: fix leading space vs tabs issues

Many spots incorrectly use only spaces for indentation (for example,
there are a lot of spots in ada-lang.c).  I've always found it awkward
when I needed to edit one of these spots: do I keep the original wrong
indentation, or do I fix it?  What if the lines around it are also
wrong, do I fix them too?  I probably don't want to fix them in the same
patch, to avoid adding noise to my patch.

So I propose to fix as much as possible once and for all (hopefully).

One typical counter argument for this is that it makes code archeology
more difficult, because git-blame will show this commit as the last
change for these lines.  My counter counter argument is: when
git-blaming, you often need to do "blame the file at the parent commit"
anyway, to go past some other refactor that touched the line you are
interested in, but is not the change you are looking for.  So you
already need a somewhat efficient way to do this.

Using some interactive tool, rather than plain git-blame, makes this
trivial.  For example, I use "tig blame <file>", where going back past
the commit that changed the currently selected line is one keystroke.
It looks like Magit in Emacs does it too (though I've never used it).
Web viewers of Github and Gitlab do it too.  My point is that it won't
really make archeology more difficult.

The other typical counter argument is that it will cause conflicts with
existing patches.  That's true... but it's a one time cost, and those
are not conflicts that are difficult to resolve.  I have also tried "git
rebase --ignore-whitespace", it seems to work well.  Although that will
re-introduce the faulty indentation, so one needs to take care of fixing
the indentation in the patch after that (which is easy).

gdb/ChangeLog:

	* aarch64-linux-tdep.c: Fix indentation.
	* aarch64-ravenscar-thread.c: Fix indentation.
	* aarch64-tdep.c: Fix indentation.
	* aarch64-tdep.h: Fix indentation.
	* ada-lang.c: Fix indentation.
	* ada-lang.h: Fix indentation.
	* ada-tasks.c: Fix indentation.
	* ada-typeprint.c: Fix indentation.
	* ada-valprint.c: Fix indentation.
	* ada-varobj.c: Fix indentation.
	* addrmap.c: Fix indentation.
	* addrmap.h: Fix indentation.
	* agent.c: Fix indentation.
	* aix-thread.c: Fix indentation.
	* alpha-bsd-nat.c: Fix indentation.
	* alpha-linux-tdep.c: Fix indentation.
	* alpha-mdebug-tdep.c: Fix indentation.
	* alpha-nbsd-tdep.c: Fix indentation.
	* alpha-obsd-tdep.c: Fix indentation.
	* alpha-tdep.c: Fix indentation.
	* amd64-bsd-nat.c: Fix indentation.
	* amd64-darwin-tdep.c: Fix indentation.
	* amd64-linux-nat.c: Fix indentation.
	* amd64-linux-tdep.c: Fix indentation.
	* amd64-nat.c: Fix indentation.
	* amd64-obsd-tdep.c: Fix indentation.
	* amd64-tdep.c: Fix indentation.
	* amd64-windows-tdep.c: Fix indentation.
	* annotate.c: Fix indentation.
	* arc-tdep.c: Fix indentation.
	* arch-utils.c: Fix indentation.
	* arch/arm-get-next-pcs.c: Fix indentation.
	* arch/arm.c: Fix indentation.
	* arm-linux-nat.c: Fix indentation.
	* arm-linux-tdep.c: Fix indentation.
	* arm-nbsd-tdep.c: Fix indentation.
	* arm-pikeos-tdep.c: Fix indentation.
	* arm-tdep.c: Fix indentation.
	* arm-tdep.h: Fix indentation.
	* arm-wince-tdep.c: Fix indentation.
	* auto-load.c: Fix indentation.
	* auxv.c: Fix indentation.
	* avr-tdep.c: Fix indentation.
	* ax-gdb.c: Fix indentation.
	* ax-general.c: Fix indentation.
	* bfin-linux-tdep.c: Fix indentation.
	* block.c: Fix indentation.
	* block.h: Fix indentation.
	* blockframe.c: Fix indentation.
	* bpf-tdep.c: Fix indentation.
	* break-catch-sig.c: Fix indentation.
	* break-catch-syscall.c: Fix indentation.
	* break-catch-throw.c: Fix indentation.
	* breakpoint.c: Fix indentation.
	* breakpoint.h: Fix indentation.
	* bsd-uthread.c: Fix indentation.
	* btrace.c: Fix indentation.
	* build-id.c: Fix indentation.
	* buildsym-legacy.h: Fix indentation.
	* buildsym.c: Fix indentation.
	* c-typeprint.c: Fix indentation.
	* c-valprint.c: Fix indentation.
	* c-varobj.c: Fix indentation.
	* charset.c: Fix indentation.
	* cli/cli-cmds.c: Fix indentation.
	* cli/cli-decode.c: Fix indentation.
	* cli/cli-decode.h: Fix indentation.
	* cli/cli-script.c: Fix indentation.
	* cli/cli-setshow.c: Fix indentation.
	* coff-pe-read.c: Fix indentation.
	* coffread.c: Fix indentation.
	* compile/compile-cplus-types.c: Fix indentation.
	* compile/compile-object-load.c: Fix indentation.
	* compile/compile-object-run.c: Fix indentation.
	* completer.c: Fix indentation.
	* corefile.c: Fix indentation.
	* corelow.c: Fix indentation.
	* cp-abi.h: Fix indentation.
	* cp-namespace.c: Fix indentation.
	* cp-support.c: Fix indentation.
	* cp-valprint.c: Fix indentation.
	* cris-linux-tdep.c: Fix indentation.
	* cris-tdep.c: Fix indentation.
	* darwin-nat-info.c: Fix indentation.
	* darwin-nat.c: Fix indentation.
	* darwin-nat.h: Fix indentation.
	* dbxread.c: Fix indentation.
	* dcache.c: Fix indentation.
	* disasm.c: Fix indentation.
	* dtrace-probe.c: Fix indentation.
	* dwarf2/abbrev.c: Fix indentation.
	* dwarf2/attribute.c: Fix indentation.
	* dwarf2/expr.c: Fix indentation.
	* dwarf2/frame.c: Fix indentation.
	* dwarf2/index-cache.c: Fix indentation.
	* dwarf2/index-write.c: Fix indentation.
	* dwarf2/line-header.c: Fix indentation.
	* dwarf2/loc.c: Fix indentation.
	* dwarf2/macro.c: Fix indentation.
	* dwarf2/read.c: Fix indentation.
	* dwarf2/read.h: Fix indentation.
	* elfread.c: Fix indentation.
	* eval.c: Fix indentation.
	* event-top.c: Fix indentation.
	* exec.c: Fix indentation.
	* exec.h: Fix indentation.
	* expprint.c: Fix indentation.
	* f-lang.c: Fix indentation.
	* f-typeprint.c: Fix indentation.
	* f-valprint.c: Fix indentation.
	* fbsd-nat.c: Fix indentation.
	* fbsd-tdep.c: Fix indentation.
	* findvar.c: Fix indentation.
	* fork-child.c: Fix indentation.
	* frame-unwind.c: Fix indentation.
	* frame-unwind.h: Fix indentation.
	* frame.c: Fix indentation.
	* frv-linux-tdep.c: Fix indentation.
	* frv-tdep.c: Fix indentation.
	* frv-tdep.h: Fix indentation.
	* ft32-tdep.c: Fix indentation.
	* gcore.c: Fix indentation.
	* gdb_bfd.c: Fix indentation.
	* gdbarch.sh: Fix indentation.
	* gdbarch.c: Re-generate
	* gdbarch.h: Re-generate.
	* gdbcore.h: Fix indentation.
	* gdbthread.h: Fix indentation.
	* gdbtypes.c: Fix indentation.
	* gdbtypes.h: Fix indentation.
	* glibc-tdep.c: Fix indentation.
	* gnu-nat.c: Fix indentation.
	* gnu-nat.h: Fix indentation.
	* gnu-v2-abi.c: Fix indentation.
	* gnu-v3-abi.c: Fix indentation.
	* go32-nat.c: Fix indentation.
	* guile/guile-internal.h: Fix indentation.
	* guile/scm-cmd.c: Fix indentation.
	* guile/scm-frame.c: Fix indentation.
	* guile/scm-iterator.c: Fix indentation.
	* guile/scm-math.c: Fix indentation.
	* guile/scm-ports.c: Fix indentation.
	* guile/scm-pretty-print.c: Fix indentation.
	* guile/scm-value.c: Fix indentation.
	* h8300-tdep.c: Fix indentation.
	* hppa-linux-nat.c: Fix indentation.
	* hppa-linux-tdep.c: Fix indentation.
	* hppa-nbsd-nat.c: Fix indentation.
	* hppa-nbsd-tdep.c: Fix indentation.
	* hppa-obsd-nat.c: Fix indentation.
	* hppa-tdep.c: Fix indentation.
	* hppa-tdep.h: Fix indentation.
	* i386-bsd-nat.c: Fix indentation.
	* i386-darwin-nat.c: Fix indentation.
	* i386-darwin-tdep.c: Fix indentation.
	* i386-dicos-tdep.c: Fix indentation.
	* i386-gnu-nat.c: Fix indentation.
	* i386-linux-nat.c: Fix indentation.
	* i386-linux-tdep.c: Fix indentation.
	* i386-nto-tdep.c: Fix indentation.
	* i386-obsd-tdep.c: Fix indentation.
	* i386-sol2-nat.c: Fix indentation.
	* i386-tdep.c: Fix indentation.
	* i386-tdep.h: Fix indentation.
	* i386-windows-tdep.c: Fix indentation.
	* i387-tdep.c: Fix indentation.
	* i387-tdep.h: Fix indentation.
	* ia64-libunwind-tdep.c: Fix indentation.
	* ia64-libunwind-tdep.h: Fix indentation.
	* ia64-linux-nat.c: Fix indentation.
	* ia64-linux-tdep.c: Fix indentation.
	* ia64-tdep.c: Fix indentation.
	* ia64-tdep.h: Fix indentation.
	* ia64-vms-tdep.c: Fix indentation.
	* infcall.c: Fix indentation.
	* infcmd.c: Fix indentation.
	* inferior.c: Fix indentation.
	* infrun.c: Fix indentation.
	* iq2000-tdep.c: Fix indentation.
	* language.c: Fix indentation.
	* linespec.c: Fix indentation.
	* linux-fork.c: Fix indentation.
	* linux-nat.c: Fix indentation.
	* linux-tdep.c: Fix indentation.
	* linux-thread-db.c: Fix indentation.
	* lm32-tdep.c: Fix indentation.
	* m2-lang.c: Fix indentation.
	* m2-typeprint.c: Fix indentation.
	* m2-valprint.c: Fix indentation.
	* m32c-tdep.c: Fix indentation.
	* m32r-linux-tdep.c: Fix indentation.
	* m32r-tdep.c: Fix indentation.
	* m68hc11-tdep.c: Fix indentation.
	* m68k-bsd-nat.c: Fix indentation.
	* m68k-linux-nat.c: Fix indentation.
	* m68k-linux-tdep.c: Fix indentation.
	* m68k-tdep.c: Fix indentation.
	* machoread.c: Fix indentation.
	* macrocmd.c: Fix indentation.
	* macroexp.c: Fix indentation.
	* macroscope.c: Fix indentation.
	* macrotab.c: Fix indentation.
	* macrotab.h: Fix indentation.
	* main.c: Fix indentation.
	* mdebugread.c: Fix indentation.
	* mep-tdep.c: Fix indentation.
	* mi/mi-cmd-catch.c: Fix indentation.
	* mi/mi-cmd-disas.c: Fix indentation.
	* mi/mi-cmd-env.c: Fix indentation.
	* mi/mi-cmd-stack.c: Fix indentation.
	* mi/mi-cmd-var.c: Fix indentation.
	* mi/mi-cmds.c: Fix indentation.
	* mi/mi-main.c: Fix indentation.
	* mi/mi-parse.c: Fix indentation.
	* microblaze-tdep.c: Fix indentation.
	* minidebug.c: Fix indentation.
	* minsyms.c: Fix indentation.
	* mips-linux-nat.c: Fix indentation.
	* mips-linux-tdep.c: Fix indentation.
	* mips-nbsd-tdep.c: Fix indentation.
	* mips-tdep.c: Fix indentation.
	* mn10300-linux-tdep.c: Fix indentation.
	* mn10300-tdep.c: Fix indentation.
	* moxie-tdep.c: Fix indentation.
	* msp430-tdep.c: Fix indentation.
	* namespace.h: Fix indentation.
	* nat/fork-inferior.c: Fix indentation.
	* nat/gdb_ptrace.h: Fix indentation.
	* nat/linux-namespaces.c: Fix indentation.
	* nat/linux-osdata.c: Fix indentation.
	* nat/netbsd-nat.c: Fix indentation.
	* nat/x86-dregs.c: Fix indentation.
	* nbsd-nat.c: Fix indentation.
	* nbsd-tdep.c: Fix indentation.
	* nios2-linux-tdep.c: Fix indentation.
	* nios2-tdep.c: Fix indentation.
	* nto-procfs.c: Fix indentation.
	* nto-tdep.c: Fix indentation.
	* objfiles.c: Fix indentation.
	* objfiles.h: Fix indentation.
	* opencl-lang.c: Fix indentation.
	* or1k-tdep.c: Fix indentation.
	* osabi.c: Fix indentation.
	* osabi.h: Fix indentation.
	* osdata.c: Fix indentation.
	* p-lang.c: Fix indentation.
	* p-typeprint.c: Fix indentation.
	* p-valprint.c: Fix indentation.
	* parse.c: Fix indentation.
	* ppc-linux-nat.c: Fix indentation.
	* ppc-linux-tdep.c: Fix indentation.
	* ppc-nbsd-nat.c: Fix indentation.
	* ppc-nbsd-tdep.c: Fix indentation.
	* ppc-obsd-nat.c: Fix indentation.
	* ppc-ravenscar-thread.c: Fix indentation.
	* ppc-sysv-tdep.c: Fix indentation.
	* ppc64-tdep.c: Fix indentation.
	* printcmd.c: Fix indentation.
	* proc-api.c: Fix indentation.
	* producer.c: Fix indentation.
	* producer.h: Fix indentation.
	* prologue-value.c: Fix indentation.
	* prologue-value.h: Fix indentation.
	* psymtab.c: Fix indentation.
	* python/py-arch.c: Fix indentation.
	* python/py-bpevent.c: Fix indentation.
	* python/py-event.c: Fix indentation.
	* python/py-event.h: Fix indentation.
	* python/py-finishbreakpoint.c: Fix indentation.
	* python/py-frame.c: Fix indentation.
	* python/py-framefilter.c: Fix indentation.
	* python/py-inferior.c: Fix indentation.
	* python/py-infthread.c: Fix indentation.
	* python/py-objfile.c: Fix indentation.
	* python/py-prettyprint.c: Fix indentation.
	* python/py-registers.c: Fix indentation.
	* python/py-signalevent.c: Fix indentation.
	* python/py-stopevent.c: Fix indentation.
	* python/py-stopevent.h: Fix indentation.
	* python/py-threadevent.c: Fix indentation.
	* python/py-tui.c: Fix indentation.
	* python/py-unwind.c: Fix indentation.
	* python/py-value.c: Fix indentation.
	* python/py-xmethods.c: Fix indentation.
	* python/python-internal.h: Fix indentation.
	* python/python.c: Fix indentation.
	* ravenscar-thread.c: Fix indentation.
	* record-btrace.c: Fix indentation.
	* record-full.c: Fix indentation.
	* record.c: Fix indentation.
	* reggroups.c: Fix indentation.
	* regset.h: Fix indentation.
	* remote-fileio.c: Fix indentation.
	* remote.c: Fix indentation.
	* reverse.c: Fix indentation.
	* riscv-linux-tdep.c: Fix indentation.
	* riscv-ravenscar-thread.c: Fix indentation.
	* riscv-tdep.c: Fix indentation.
	* rl78-tdep.c: Fix indentation.
	* rs6000-aix-tdep.c: Fix indentation.
	* rs6000-lynx178-tdep.c: Fix indentation.
	* rs6000-nat.c: Fix indentation.
	* rs6000-tdep.c: Fix indentation.
	* rust-lang.c: Fix indentation.
	* rx-tdep.c: Fix indentation.
	* s12z-tdep.c: Fix indentation.
	* s390-linux-tdep.c: Fix indentation.
	* score-tdep.c: Fix indentation.
	* ser-base.c: Fix indentation.
	* ser-mingw.c: Fix indentation.
	* ser-uds.c: Fix indentation.
	* ser-unix.c: Fix indentation.
	* serial.c: Fix indentation.
	* sh-linux-tdep.c: Fix indentation.
	* sh-nbsd-tdep.c: Fix indentation.
	* sh-tdep.c: Fix indentation.
	* skip.c: Fix indentation.
	* sol-thread.c: Fix indentation.
	* solib-aix.c: Fix indentation.
	* solib-darwin.c: Fix indentation.
	* solib-frv.c: Fix indentation.
	* solib-svr4.c: Fix indentation.
	* solib.c: Fix indentation.
	* source.c: Fix indentation.
	* sparc-linux-tdep.c: Fix indentation.
	* sparc-nbsd-tdep.c: Fix indentation.
	* sparc-obsd-tdep.c: Fix indentation.
	* sparc-ravenscar-thread.c: Fix indentation.
	* sparc-tdep.c: Fix indentation.
	* sparc64-linux-tdep.c: Fix indentation.
	* sparc64-nbsd-tdep.c: Fix indentation.
	* sparc64-obsd-tdep.c: Fix indentation.
	* sparc64-tdep.c: Fix indentation.
	* stabsread.c: Fix indentation.
	* stack.c: Fix indentation.
	* stap-probe.c: Fix indentation.
	* stubs/ia64vms-stub.c: Fix indentation.
	* stubs/m32r-stub.c: Fix indentation.
	* stubs/m68k-stub.c: Fix indentation.
	* stubs/sh-stub.c: Fix indentation.
	* stubs/sparc-stub.c: Fix indentation.
	* symfile-mem.c: Fix indentation.
	* symfile.c: Fix indentation.
	* symfile.h: Fix indentation.
	* symmisc.c: Fix indentation.
	* symtab.c: Fix indentation.
	* symtab.h: Fix indentation.
	* target-float.c: Fix indentation.
	* target.c: Fix indentation.
	* target.h: Fix indentation.
	* tic6x-tdep.c: Fix indentation.
	* tilegx-linux-tdep.c: Fix indentation.
	* tilegx-tdep.c: Fix indentation.
	* top.c: Fix indentation.
	* tracefile-tfile.c: Fix indentation.
	* tracepoint.c: Fix indentation.
	* tui/tui-disasm.c: Fix indentation.
	* tui/tui-io.c: Fix indentation.
	* tui/tui-regs.c: Fix indentation.
	* tui/tui-stack.c: Fix indentation.
	* tui/tui-win.c: Fix indentation.
	* tui/tui-winsource.c: Fix indentation.
	* tui/tui.c: Fix indentation.
	* typeprint.c: Fix indentation.
	* ui-out.h: Fix indentation.
	* unittests/copy_bitwise-selftests.c: Fix indentation.
	* unittests/memory-map-selftests.c: Fix indentation.
	* utils.c: Fix indentation.
	* v850-tdep.c: Fix indentation.
	* valarith.c: Fix indentation.
	* valops.c: Fix indentation.
	* valprint.c: Fix indentation.
	* valprint.h: Fix indentation.
	* value.c: Fix indentation.
	* value.h: Fix indentation.
	* varobj.c: Fix indentation.
	* vax-tdep.c: Fix indentation.
	* windows-nat.c: Fix indentation.
	* windows-tdep.c: Fix indentation.
	* xcoffread.c: Fix indentation.
	* xml-syscall.c: Fix indentation.
	* xml-tdesc.c: Fix indentation.
	* xstormy16-tdep.c: Fix indentation.
	* xtensa-config.c: Fix indentation.
	* xtensa-linux-nat.c: Fix indentation.
	* xtensa-linux-tdep.c: Fix indentation.
	* xtensa-tdep.c: Fix indentation.

gdbserver/ChangeLog:

	* ax.cc: Fix indentation.
	* dll.cc: Fix indentation.
	* inferiors.h: Fix indentation.
	* linux-low.cc: Fix indentation.
	* linux-nios2-low.cc: Fix indentation.
	* linux-ppc-ipa.cc: Fix indentation.
	* linux-ppc-low.cc: Fix indentation.
	* linux-x86-low.cc: Fix indentation.
	* linux-xtensa-low.cc: Fix indentation.
	* regcache.cc: Fix indentation.
	* server.cc: Fix indentation.
	* tracepoint.cc: Fix indentation.

gdbsupport/ChangeLog:

	* common-exceptions.h: Fix indentation.
	* event-loop.cc: Fix indentation.
	* fileio.cc: Fix indentation.
	* filestuff.cc: Fix indentation.
	* gdb-dlfcn.cc: Fix indentation.
	* gdb_string_view.h: Fix indentation.
	* job-control.cc: Fix indentation.
	* signals.cc: Fix indentation.

Change-Id: I4bad7ae6be0fbe14168b8ebafb98ffe14964a695

1 files changed, 549 insertions, 549 deletions

diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c
index 068ae99..66575b7 100644
--- a/gdb/cris-tdep.c
+++ b/gdb/cris-tdep.c
@@ -404,7 +404,7 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
 
 static void
 cris_sigtramp_frame_this_id (struct frame_info *this_frame, void **this_cache,
-                             struct frame_id *this_id)
+			     struct frame_id *this_id)
 {
   struct cris_unwind_cache *cache =
     cris_sigtramp_frame_unwind_cache (this_frame, this_cache);
@@ -417,7 +417,7 @@ static struct value *cris_frame_prev_register (struct frame_info *this_frame,
 					       void **this_cache, int regnum);
 static struct value *
 cris_sigtramp_frame_prev_register (struct frame_info *this_frame,
-                                   void **this_cache, int regnum)
+				   void **this_cache, int regnum)
 {
   /* Make sure we've initialized the cache.  */
   cris_sigtramp_frame_unwind_cache (this_frame, this_cache);
@@ -534,9 +534,9 @@ enum cris_opcode_masks
 /* Functions for opcodes.  The general form of the ETRAX 16-bit instruction:
    Bit 15 - 12   Operand2
        11 - 10   Mode
-        9 -  6   Opcode
-        5 -  4   Size
-        3 -  0   Operand1  */
+	9 -  6   Opcode
+	5 -  4   Size
+	3 -  0   Operand1  */
 
 static int 
 cris_get_operand2 (unsigned short insn)
@@ -631,7 +631,7 @@ static void cris_gdb_func (struct gdbarch *, enum cris_op_type, unsigned short,
 			   inst_env_type *);
 
 static struct gdbarch *cris_gdbarch_init (struct gdbarch_info,
-                                          struct gdbarch_list *);
+					  struct gdbarch_list *);
 
 static void cris_dump_tdep (struct gdbarch *, struct ui_file *);
 
@@ -772,10 +772,10 @@ cris_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
 
 static CORE_ADDR
 cris_push_dummy_code (struct gdbarch *gdbarch,
-                      CORE_ADDR sp, CORE_ADDR funaddr,
-                      struct value **args, int nargs,
-                      struct type *value_type,
-                      CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
+		      CORE_ADDR sp, CORE_ADDR funaddr,
+		      struct value **args, int nargs,
+		      struct type *value_type,
+		      CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
 		      struct regcache *regcache)
 {
   /* Allocate space sufficient for a breakpoint.  */
@@ -825,40 +825,40 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
       
       /* How may registers worth of storage do we need for this argument?  */
       reg_demand = (len / 4) + (len % 4 != 0 ? 1 : 0);
-        
+	
       if (len <= (2 * 4) && (argreg + reg_demand - 1 <= ARG4_REGNUM))
-        {
-          /* Data passed by value.  Fits in available register(s).  */
-          for (i = 0; i < reg_demand; i++)
-            {
-              regcache->cooked_write (argreg, val);
-              argreg++;
-              val += 4;
-            }
-        }
+	{
+	  /* Data passed by value.  Fits in available register(s).  */
+	  for (i = 0; i < reg_demand; i++)
+	    {
+	      regcache->cooked_write (argreg, val);
+	      argreg++;
+	      val += 4;
+	    }
+	}
       else if (len <= (2 * 4) && argreg <= ARG4_REGNUM)
-        {
-          /* Data passed by value. Does not fit in available register(s).
-             Use the register(s) first, then the stack.  */
-          for (i = 0; i < reg_demand; i++)
-            {
-              if (argreg <= ARG4_REGNUM)
-                {
-        	  regcache->cooked_write (argreg, val);
-                  argreg++;
-                  val += 4;
-                }
-              else
-                {
+	{
+	  /* Data passed by value. Does not fit in available register(s).
+	     Use the register(s) first, then the stack.  */
+	  for (i = 0; i < reg_demand; i++)
+	    {
+	      if (argreg <= ARG4_REGNUM)
+		{
+		  regcache->cooked_write (argreg, val);
+		  argreg++;
+		  val += 4;
+		}
+	      else
+		{
 		  /* Push item for later so that pushed arguments
 		     come in the right order.  */
 		  si = push_stack_item (si, val, 4);
-                  val += 4;
-                }
-            }
-        }
+		  val += 4;
+		}
+	    }
+	}
       else if (len > (2 * 4))
-        {
+	{
 	  /* Data passed by reference.  Push copy of data onto stack
 	     and pass pointer to this copy as argument.  */
 	  sp = (sp - len) & ~3;
@@ -875,13 +875,13 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
 	      store_unsigned_integer (buf, 4, byte_order, sp);
 	      si = push_stack_item (si, buf, 4);
 	    }
-        }
+	}
       else
-        {
-          /* Data passed by value.  No available registers.  Put it on
-             the stack.  */
+	{
+	  /* Data passed by value.  No available registers.  Put it on
+	     the stack.  */
 	   si = push_stack_item (si, val, len);
-        }
+	}
     }
 
   while (si)
@@ -1049,165 +1049,165 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame,
       insn = read_memory_unsigned_integer (pc, 2, byte_order);
       pc += 2;
       if (insn == 0xE1FC)
-        {
-          /* push <reg> 32 bit instruction.  */
-          insn_next = read_memory_unsigned_integer (pc, 2, byte_order);
-          pc += 2;
-          regno = cris_get_operand2 (insn_next);
+	{
+	  /* push <reg> 32 bit instruction.  */
+	  insn_next = read_memory_unsigned_integer (pc, 2, byte_order);
+	  pc += 2;
+	  regno = cris_get_operand2 (insn_next);
 	  if (info)
 	    {
 	      info->sp_offset += 4;
 	    }
-          /* This check, meant to recognize srp, used to be regno == 
-             (SRP_REGNUM - NUM_GENREGS), but that covers r11 also.  */
-          if (insn_next == 0xBE7E)
-            {
+	  /* This check, meant to recognize srp, used to be regno == 
+	     (SRP_REGNUM - NUM_GENREGS), but that covers r11 also.  */
+	  if (insn_next == 0xBE7E)
+	    {
 	      if (info)
 		{
 		  info->leaf_function = 0;
 		}
-            }
+	    }
 	  else if (insn_next == 0x8FEE)
-            {
+	    {
 	      /* push $r8 */
 	      if (info)
 		{
 		  info->r8_offset = info->sp_offset;
 		}
-            }
-        }
+	    }
+	}
       else if (insn == 0x866E)
-        {
-          /* move.d sp,r8 */
+	{
+	  /* move.d sp,r8 */
 	  if (info)
 	    {
 	      info->uses_frame = 1;
 	    }
-          continue;
-        }
+	  continue;
+	}
       else if (cris_get_operand2 (insn) == gdbarch_sp_regnum (gdbarch)
-               && cris_get_mode (insn) == 0x0000
-               && cris_get_opcode (insn) == 0x000A)
-        {
-          /* subq <val>,sp */
+	       && cris_get_mode (insn) == 0x0000
+	       && cris_get_opcode (insn) == 0x000A)
+	{
+	  /* subq <val>,sp */
 	  if (info)
 	    {
 	      info->sp_offset += cris_get_quick_value (insn);
 	    }
-        }
+	}
       else if (cris_get_mode (insn) == 0x0002 
-               && cris_get_opcode (insn) == 0x000F
-               && cris_get_size (insn) == 0x0003
-               && cris_get_operand1 (insn) == gdbarch_sp_regnum (gdbarch))
-        {
-          /* movem r<regsave>,[sp] */
-          regsave = cris_get_operand2 (insn);
-        }
+	       && cris_get_opcode (insn) == 0x000F
+	       && cris_get_size (insn) == 0x0003
+	       && cris_get_operand1 (insn) == gdbarch_sp_regnum (gdbarch))
+	{
+	  /* movem r<regsave>,[sp] */
+	  regsave = cris_get_operand2 (insn);
+	}
       else if (cris_get_operand2 (insn) == gdbarch_sp_regnum (gdbarch)
-               && ((insn & 0x0F00) >> 8) == 0x0001
-               && (cris_get_signed_offset (insn) < 0))
-        {
-          /* Immediate byte offset addressing prefix word with sp as base 
-             register.  Used for CRIS v8 i.e. ETRAX 100 and newer if <val> 
-             is between 64 and 128. 
-             movem r<regsave>,[sp=sp-<val>] */
+	       && ((insn & 0x0F00) >> 8) == 0x0001
+	       && (cris_get_signed_offset (insn) < 0))
+	{
+	  /* Immediate byte offset addressing prefix word with sp as base 
+	     register.  Used for CRIS v8 i.e. ETRAX 100 and newer if <val> 
+	     is between 64 and 128. 
+	     movem r<regsave>,[sp=sp-<val>] */
 	  if (info)
 	    {
 	      info->sp_offset += -cris_get_signed_offset (insn);
 	    }
 	  insn_next = read_memory_unsigned_integer (pc, 2, byte_order);
-          pc += 2;
-          if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE
-              && cris_get_opcode (insn_next) == 0x000F
-              && cris_get_size (insn_next) == 0x0003
-              && cris_get_operand1 (insn_next) == gdbarch_sp_regnum
+	  pc += 2;
+	  if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE
+	      && cris_get_opcode (insn_next) == 0x000F
+	      && cris_get_size (insn_next) == 0x0003
+	      && cris_get_operand1 (insn_next) == gdbarch_sp_regnum
 						  (gdbarch))
-            {
-              regsave = cris_get_operand2 (insn_next);
-            }
-          else
-            {
-              /* The prologue ended before the limit was reached.  */
-              pc -= 4;
-              break;
-            }
-        }
+	    {
+	      regsave = cris_get_operand2 (insn_next);
+	    }
+	  else
+	    {
+	      /* The prologue ended before the limit was reached.  */
+	      pc -= 4;
+	      break;
+	    }
+	}
       else if (cris_get_mode (insn) == 0x0001
-               && cris_get_opcode (insn) == 0x0009
-               && cris_get_size (insn) == 0x0002)
-        {
-          /* move.d r<10..13>,r<0..15> */
-          source_register = cris_get_operand1 (insn);
-
-          /* FIXME?  In the glibc solibs, the prologue might contain something
-             like (this example taken from relocate_doit):
-             move.d $pc,$r0
-             sub.d 0xfffef426,$r0
-             which isn't covered by the source_register check below.  Question
-             is whether to add a check for this combo, or make better use of
-             the limit variable instead.  */
-          if (source_register < ARG1_REGNUM || source_register > ARG4_REGNUM)
-            {
-              /* The prologue ended before the limit was reached.  */
-              pc -= 2;
-              break;
-            }
-        }
+	       && cris_get_opcode (insn) == 0x0009
+	       && cris_get_size (insn) == 0x0002)
+	{
+	  /* move.d r<10..13>,r<0..15> */
+	  source_register = cris_get_operand1 (insn);
+
+	  /* FIXME?  In the glibc solibs, the prologue might contain something
+	     like (this example taken from relocate_doit):
+	     move.d $pc,$r0
+	     sub.d 0xfffef426,$r0
+	     which isn't covered by the source_register check below.  Question
+	     is whether to add a check for this combo, or make better use of
+	     the limit variable instead.  */
+	  if (source_register < ARG1_REGNUM || source_register > ARG4_REGNUM)
+	    {
+	      /* The prologue ended before the limit was reached.  */
+	      pc -= 2;
+	      break;
+	    }
+	}
       else if (cris_get_operand2 (insn) == CRIS_FP_REGNUM 
-               /* The size is a fixed-size.  */
-               && ((insn & 0x0F00) >> 8) == 0x0001 
-               /* A negative offset.  */
-               && (cris_get_signed_offset (insn) < 0))  
-        {
-          /* move.S rZ,[r8-U] (?) */
-          insn_next = read_memory_unsigned_integer (pc, 2, byte_order);
-          pc += 2;
-          regno = cris_get_operand2 (insn_next);
-          if ((regno >= 0 && regno < gdbarch_sp_regnum (gdbarch))
-              && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
-              && cris_get_opcode (insn_next) == 0x000F)
-            {
-              /* move.S rZ,[r8-U] */
-              continue;
-            }
-          else
-            {
-              /* The prologue ended before the limit was reached.  */
-              pc -= 4;
-              break;
-            }
-        }
+	       /* The size is a fixed-size.  */
+	       && ((insn & 0x0F00) >> 8) == 0x0001 
+	       /* A negative offset.  */
+	       && (cris_get_signed_offset (insn) < 0))  
+	{
+	  /* move.S rZ,[r8-U] (?) */
+	  insn_next = read_memory_unsigned_integer (pc, 2, byte_order);
+	  pc += 2;
+	  regno = cris_get_operand2 (insn_next);
+	  if ((regno >= 0 && regno < gdbarch_sp_regnum (gdbarch))
+	      && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
+	      && cris_get_opcode (insn_next) == 0x000F)
+	    {
+	      /* move.S rZ,[r8-U] */
+	      continue;
+	    }
+	  else
+	    {
+	      /* The prologue ended before the limit was reached.  */
+	      pc -= 4;
+	      break;
+	    }
+	}
       else if (cris_get_operand2 (insn) == CRIS_FP_REGNUM 
-               /* The size is a fixed-size.  */
-               && ((insn & 0x0F00) >> 8) == 0x0001 
-               /* A positive offset.  */
-               && (cris_get_signed_offset (insn) > 0))  
-        {
-          /* move.S [r8+U],rZ (?) */
+	       /* The size is a fixed-size.  */
+	       && ((insn & 0x0F00) >> 8) == 0x0001 
+	       /* A positive offset.  */
+	       && (cris_get_signed_offset (insn) > 0))  
+	{
+	  /* move.S [r8+U],rZ (?) */
 	  insn_next = read_memory_unsigned_integer (pc, 2, byte_order);
-          pc += 2;
-          regno = cris_get_operand2 (insn_next);
-          if ((regno >= 0 && regno < gdbarch_sp_regnum (gdbarch))
-              && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
-              && cris_get_opcode (insn_next) == 0x0009
-              && cris_get_operand1 (insn_next) == regno)
-            {
-              /* move.S [r8+U],rZ */
-              continue;
-            }
-          else
-            {
-              /* The prologue ended before the limit was reached.  */
-              pc -= 4;
-              break;
-            }
-        }
+	  pc += 2;
+	  regno = cris_get_operand2 (insn_next);
+	  if ((regno >= 0 && regno < gdbarch_sp_regnum (gdbarch))
+	      && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
+	      && cris_get_opcode (insn_next) == 0x0009
+	      && cris_get_operand1 (insn_next) == regno)
+	    {
+	      /* move.S [r8+U],rZ */
+	      continue;
+	    }
+	  else
+	    {
+	      /* The prologue ended before the limit was reached.  */
+	      pc -= 4;
+	      break;
+	    }
+	}
       else
-        {
-          /* The prologue ended before the limit was reached.  */
-          pc -= 2;
-          break;
-        }
+	{
+	  /* The prologue ended before the limit was reached.  */
+	  pc -= 2;
+	  break;
+	}
     }
 
   /* We only want to know the end of the prologue when this_frame and info
@@ -1225,21 +1225,21 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame,
     {
       ULONGEST this_base;
       /* The SP was moved to the FP.  This indicates that a new frame
-         was created.  Get THIS frame's FP value by unwinding it from
-         the next frame.  */
+	 was created.  Get THIS frame's FP value by unwinding it from
+	 the next frame.  */
       this_base = get_frame_register_unsigned (this_frame, CRIS_FP_REGNUM);
       info->base = this_base;
       info->saved_regs[CRIS_FP_REGNUM].addr = info->base;
   
       /* The FP points at the last saved register.  Adjust the FP back
-         to before the first saved register giving the SP.  */
+	 to before the first saved register giving the SP.  */
       info->prev_sp = info->base + info->r8_offset;
     }
   else
     {
       ULONGEST this_base;      
       /* Assume that the FP is this frame's SP but with that pushed
-         stack space added back.  */
+	 stack space added back.  */
       this_base = get_frame_register_unsigned (this_frame,
 					       gdbarch_sp_regnum (gdbarch));
       info->base = this_base;
@@ -1440,16 +1440,16 @@ cris_register_size (struct gdbarch *gdbarch, int regno)
   else if (regno >= NUM_GENREGS && regno < (NUM_GENREGS + NUM_SPECREGS))
     {
       /* Special register (R16 - R31).  cris_spec_regs is zero-based. 
-         Adjust regno accordingly.  */
+	 Adjust regno accordingly.  */
       spec_regno = regno - NUM_GENREGS;
       
       for (i = 0; cris_spec_regs[i].name != NULL; i++)
-        {
-          if (cris_spec_regs[i].number == spec_regno 
-              && cris_spec_reg_applicable (gdbarch, cris_spec_regs[i]))
-            /* Go with the first applicable register.  */
-            return cris_spec_regs[i].reg_size;
-        }
+	{
+	  if (cris_spec_regs[i].number == spec_regno 
+	      && cris_spec_reg_applicable (gdbarch, cris_spec_regs[i]))
+	    /* Go with the first applicable register.  */
+	    return cris_spec_regs[i].reg_size;
+	}
       /* Special register not applicable to this CRIS version.  */
       return 0;
     }
@@ -1472,7 +1472,7 @@ static int
 cris_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
 {
   return ((regno < 0 || regno >= gdbarch_num_regs (gdbarch))
-          || (cris_register_size (gdbarch, regno) == 0));
+	  || (cris_register_size (gdbarch, regno) == 0));
 }
 
 /* Nonzero if regno should not be written to the target, for various 
@@ -1513,7 +1513,7 @@ static int
 crisv32_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
 {
   return ((regno < 0 || regno >= gdbarch_num_regs (gdbarch))
-          || (cris_register_size (gdbarch, regno) == 0));
+	  || (cris_register_size (gdbarch, regno) == 0));
 }
 
 /* Nonzero if regno should not be written to the target, for various 
@@ -1753,7 +1753,7 @@ cris_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
 
 static void
 cris_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
-                            struct dwarf2_frame_state_reg *reg,
+			    struct dwarf2_frame_state_reg *reg,
 			    struct frame_info *this_frame)
 {
   /* The return address column.  */
@@ -1825,7 +1825,7 @@ cris_return_value (struct gdbarch *gdbarch, struct value *function,
 
 static int
 constraint (unsigned int insn, const char *inst_args,
-            inst_env_type *inst_env)
+	    inst_env_type *inst_env)
 {
   int retval = 0;
   int tmp, i;
@@ -1836,61 +1836,61 @@ constraint (unsigned int insn, const char *inst_args,
     switch (*s) 
       {
       case 'm':
-        if ((insn & 0x30) == 0x30)
-          return -1;
-        break;
-        
+	if ((insn & 0x30) == 0x30)
+	  return -1;
+	break;
+	
       case 'S':
-        /* A prefix operand.  */
-        if (inst_env->prefix_found)
-          break;
-        else
-          return -1;
+	/* A prefix operand.  */
+	if (inst_env->prefix_found)
+	  break;
+	else
+	  return -1;
 
       case 'B':
-        /* A "push" prefix.  (This check was REMOVED by san 970921.)  Check for
-           valid "push" size.  In case of special register, it may be != 4.  */
-        if (inst_env->prefix_found)
-          break;
-        else
-          return -1;
+	/* A "push" prefix.  (This check was REMOVED by san 970921.)  Check for
+	   valid "push" size.  In case of special register, it may be != 4.  */
+	if (inst_env->prefix_found)
+	  break;
+	else
+	  return -1;
 
       case 'D':
-        retval = (((insn >> 0xC) & 0xF) == (insn & 0xF));
-        if (!retval)
-          return -1;
-        else 
-          retval += 4;
-        break;
+	retval = (((insn >> 0xC) & 0xF) == (insn & 0xF));
+	if (!retval)
+	  return -1;
+	else 
+	  retval += 4;
+	break;
 
       case 'P':
-        tmp = (insn >> 0xC) & 0xF;
-
-        for (i = 0; cris_spec_regs[i].name != NULL; i++)
-          {
-            /* Since we match four bits, we will give a value of
-               4 - 1 = 3 in a match.  If there is a corresponding
-               exact match of a special register in another pattern, it
-               will get a value of 4, which will be higher.  This should
-               be correct in that an exact pattern would match better that
-               a general pattern.
-               Note that there is a reason for not returning zero; the
-               pattern for "clear" is partly  matched in the bit-pattern
-               (the two lower bits must be zero), while the bit-pattern
-               for a move from a special register is matched in the
-               register constraint.
-               This also means we will will have a race condition if
-               there is a partly match in three bits in the bit pattern.  */
-            if (tmp == cris_spec_regs[i].number)
-              {
-                retval += 3;
-                break;
-              }
-          }
-        
-        if (cris_spec_regs[i].name == NULL)
-          return -1;
-        break;
+	tmp = (insn >> 0xC) & 0xF;
+
+	for (i = 0; cris_spec_regs[i].name != NULL; i++)
+	  {
+	    /* Since we match four bits, we will give a value of
+	       4 - 1 = 3 in a match.  If there is a corresponding
+	       exact match of a special register in another pattern, it
+	       will get a value of 4, which will be higher.  This should
+	       be correct in that an exact pattern would match better that
+	       a general pattern.
+	       Note that there is a reason for not returning zero; the
+	       pattern for "clear" is partly  matched in the bit-pattern
+	       (the two lower bits must be zero), while the bit-pattern
+	       for a move from a special register is matched in the
+	       register constraint.
+	       This also means we will will have a race condition if
+	       there is a partly match in three bits in the bit pattern.  */
+	    if (tmp == cris_spec_regs[i].number)
+	      {
+		retval += 3;
+		break;
+	      }
+	  }
+	
+	if (cris_spec_regs[i].name == NULL)
+	  return -1;
+	break;
       }
   return retval;
 }
@@ -1924,27 +1924,27 @@ find_cris_op (unsigned short insn, inst_env_type *inst_env)
   for (i = 0; cris_opcodes[i].name != NULL; i++)
     {
       if (((cris_opcodes[i].match & insn) == cris_opcodes[i].match) 
-          && ((cris_opcodes[i].lose & insn) == 0)
+	  && ((cris_opcodes[i].lose & insn) == 0)
 	  /* Only CRISv10 instructions, please.  */
 	  && (cris_opcodes[i].applicable_version != cris_ver_v32p))
-        {
-          level_of_match = constraint (insn, cris_opcodes[i].args, inst_env);
-          if (level_of_match >= 0)
-            {
-              level_of_match +=
-                number_of_bits (cris_opcodes[i].match | cris_opcodes[i].lose);
-              if (level_of_match > max_level_of_match)
-                {
-                  max_matched = i;
-                  max_level_of_match = level_of_match;
-                  if (level_of_match == 16)
-                    {
-                      /* All bits matched, cannot find better.  */
-                      break;
-                    }
-                }
-            }
-        }
+	{
+	  level_of_match = constraint (insn, cris_opcodes[i].args, inst_env);
+	  if (level_of_match >= 0)
+	    {
+	      level_of_match +=
+		number_of_bits (cris_opcodes[i].match | cris_opcodes[i].lose);
+	      if (level_of_match > max_level_of_match)
+		{
+		  max_matched = i;
+		  max_level_of_match = level_of_match;
+		  if (level_of_match == 16)
+		    {
+		      /* All bits matched, cannot find better.  */
+		      break;
+		    }
+		}
+	    }
+	}
     }
   return max_matched;
 }
@@ -1990,33 +1990,33 @@ find_step_target (struct regcache *regcache, inst_env_type *inst_env)
 	     (inst_env->reg[gdbarch_pc_regnum (gdbarch)], 2, byte_order);
 
       /* If the instruction is not in a delay slot the new content of the
-         PC is [PC] + 2.  If the instruction is in a delay slot it is not
-         that simple.  Since a instruction in a delay slot cannot change 
-         the content of the PC, it does not matter what value PC will have. 
-         Just make sure it is a valid instruction.  */
+	 PC is [PC] + 2.  If the instruction is in a delay slot it is not
+	 that simple.  Since a instruction in a delay slot cannot change 
+	 the content of the PC, it does not matter what value PC will have. 
+	 Just make sure it is a valid instruction.  */
       if (!inst_env->delay_slot_pc_active)
-        {
-          inst_env->reg[gdbarch_pc_regnum (gdbarch)] += 2;
-        }
+	{
+	  inst_env->reg[gdbarch_pc_regnum (gdbarch)] += 2;
+	}
       else
-        {
-          inst_env->delay_slot_pc_active = 0;
-          inst_env->reg[gdbarch_pc_regnum (gdbarch)]
+	{
+	  inst_env->delay_slot_pc_active = 0;
+	  inst_env->reg[gdbarch_pc_regnum (gdbarch)]
 	    = inst_env->delay_slot_pc;
-        }
+	}
       /* Analyse the present instruction.  */
       i = find_cris_op (insn, inst_env);
       if (i == -1)
-        {
-          inst_env->invalid = 1;
-        }
+	{
+	  inst_env->invalid = 1;
+	}
       else
-        {
-          cris_gdb_func (gdbarch, cris_opcodes[i].op, insn, inst_env);
-        }
+	{
+	  cris_gdb_func (gdbarch, cris_opcodes[i].op, insn, inst_env);
+	}
     } while (!inst_env->invalid 
-             && (inst_env->prefix_found || inst_env->xflag_found 
-                 || inst_env->slot_needed));
+	     && (inst_env->prefix_found || inst_env->xflag_found 
+		 || inst_env->slot_needed));
   return i;
 }
 
@@ -2043,7 +2043,7 @@ cris_software_single_step (struct regcache *regcache)
   else
     {
       /* Insert at most two breakpoints.  One for the next PC content
-         and possibly another one for a branch, jump, etc.  */
+	 and possibly another one for a branch, jump, etc.  */
       CORE_ADDR next_pc
 	= (CORE_ADDR) inst_env.reg[gdbarch_pc_regnum (gdbarch)];
 
@@ -2095,11 +2095,11 @@ process_autoincrement (int size, unsigned short inst, inst_env_type *inst_env)
       inst_env->reg[cris_get_operand1 (inst)] += 1;
 
       /* The PC must be word aligned, so increase the PC with one
-         word even if the size is byte.  */
+	 word even if the size is byte.  */
       if (cris_get_operand1 (inst) == REG_PC)
-        {
-          inst_env->reg[REG_PC] += 1;
-        }
+	{
+	  inst_env->reg[REG_PC] += 1;
+	}
     }
   else if (size == INST_WORD_SIZE)
     {
@@ -2316,19 +2316,19 @@ abs_op (unsigned short inst, inst_env_type *inst_env)
     
       /* It's invalid to change to the PC if we are in a delay slot.  */
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
 
       value = (long) inst_env->reg[REG_PC];
 
       /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK.  */
       if (value != SIGNED_DWORD_MASK)
-        {
-          value = -value;
-          inst_env->reg[REG_PC] = (long) value;
-        }
+	{
+	  value = -value;
+	  inst_env->reg[REG_PC] = (long) value;
+	}
     }
 
   inst_env->slot_needed = 0;
@@ -2377,10 +2377,10 @@ asr_op (unsigned short inst, inst_env_type *inst_env)
     {
       /* It's invalid to change the PC in a delay slot.  */
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
       /* Get the number of bits to shift.  */
       shift_steps
 	= cris_get_asr_shift_steps (inst_env->reg[cris_get_operand1 (inst)]);
@@ -2388,45 +2388,45 @@ asr_op (unsigned short inst, inst_env_type *inst_env)
 
       /* Find out how many bits the operation should apply to.  */
       if (cris_get_size (inst) == INST_BYTE_SIZE)
-        {
-          if (value & SIGNED_BYTE_MASK)
-            {
-              signed_extend_mask = 0xFF;
-              signed_extend_mask = signed_extend_mask >> shift_steps;
-              signed_extend_mask = ~signed_extend_mask;
-            }
-          value = value >> shift_steps;
-          value |= signed_extend_mask;
-          value &= 0xFF;
-          inst_env->reg[REG_PC] &= 0xFFFFFF00;
-          inst_env->reg[REG_PC] |= value;
-        }
+	{
+	  if (value & SIGNED_BYTE_MASK)
+	    {
+	      signed_extend_mask = 0xFF;
+	      signed_extend_mask = signed_extend_mask >> shift_steps;
+	      signed_extend_mask = ~signed_extend_mask;
+	    }
+	  value = value >> shift_steps;
+	  value |= signed_extend_mask;
+	  value &= 0xFF;
+	  inst_env->reg[REG_PC] &= 0xFFFFFF00;
+	  inst_env->reg[REG_PC] |= value;
+	}
       else if (cris_get_size (inst) == INST_WORD_SIZE)
-        {
-          if (value & SIGNED_WORD_MASK)
-            {
-              signed_extend_mask = 0xFFFF;
-              signed_extend_mask = signed_extend_mask >> shift_steps;
-              signed_extend_mask = ~signed_extend_mask;
-            }
-          value = value >> shift_steps;
-          value |= signed_extend_mask;
-          value &= 0xFFFF;
-          inst_env->reg[REG_PC] &= 0xFFFF0000;
-          inst_env->reg[REG_PC] |= value;
-        }
+	{
+	  if (value & SIGNED_WORD_MASK)
+	    {
+	      signed_extend_mask = 0xFFFF;
+	      signed_extend_mask = signed_extend_mask >> shift_steps;
+	      signed_extend_mask = ~signed_extend_mask;
+	    }
+	  value = value >> shift_steps;
+	  value |= signed_extend_mask;
+	  value &= 0xFFFF;
+	  inst_env->reg[REG_PC] &= 0xFFFF0000;
+	  inst_env->reg[REG_PC] |= value;
+	}
       else if (cris_get_size (inst) == INST_DWORD_SIZE)
-        {
-          if (value & SIGNED_DWORD_MASK)
-            {
-              signed_extend_mask = 0xFFFFFFFF;
-              signed_extend_mask = signed_extend_mask >> shift_steps;
-              signed_extend_mask = ~signed_extend_mask;
-            }
-          value = value >> shift_steps;
-          value |= signed_extend_mask;
-          inst_env->reg[REG_PC]  = value;
-        }
+	{
+	  if (value & SIGNED_DWORD_MASK)
+	    {
+	      signed_extend_mask = 0xFFFFFFFF;
+	      signed_extend_mask = signed_extend_mask >> shift_steps;
+	      signed_extend_mask = ~signed_extend_mask;
+	    }
+	  value = value >> shift_steps;
+	  value |= signed_extend_mask;
+	  inst_env->reg[REG_PC]  = value;
+	}
     }
   inst_env->slot_needed = 0;
   inst_env->prefix_found = 0;
@@ -2457,20 +2457,20 @@ asrq_op (unsigned short inst, inst_env_type *inst_env)
 
       /* It's invalid to change the PC in a delay slot.  */
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
       /* The shift size is given as a 5 bit quick value, i.e. we don't
-         want the sign bit of the quick value.  */
+	 want the sign bit of the quick value.  */
       shift_steps = cris_get_asr_shift_steps (inst);
       value = inst_env->reg[REG_PC];
       if (value & SIGNED_DWORD_MASK)
-        {
-          signed_extend_mask = 0xFFFFFFFF;
-          signed_extend_mask = signed_extend_mask >> shift_steps;
-          signed_extend_mask = ~signed_extend_mask;
-        }
+	{
+	  signed_extend_mask = 0xFFFFFFFF;
+	  signed_extend_mask = signed_extend_mask >> shift_steps;
+	  signed_extend_mask = ~signed_extend_mask;
+	}
       value = value >> shift_steps;
       value |= signed_extend_mask;
       inst_env->reg[REG_PC]  = value;
@@ -2541,10 +2541,10 @@ two_operand_bound_op (unsigned short inst, inst_env_type *inst_env)
     {
       /* It's invalid to change the PC in a delay slot.  */
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
       process_autoincrement (cris_get_size (inst), inst, inst_env);
     }
   inst_env->slot_needed = 0;
@@ -2618,19 +2618,19 @@ reg_mode_clear_op (unsigned short inst, inst_env_type *inst_env)
       /* The instruction will clear the instruction's size bits.  */
       int clear_size = cris_get_clear_size (inst);
       if (clear_size == INST_BYTE_SIZE)
-        {
-          inst_env->delay_slot_pc = inst_env->reg[REG_PC] & 0xFFFFFF00;
-        }
+	{
+	  inst_env->delay_slot_pc = inst_env->reg[REG_PC] & 0xFFFFFF00;
+	}
       if (clear_size == INST_WORD_SIZE)
-        {
-          inst_env->delay_slot_pc = inst_env->reg[REG_PC] & 0xFFFF0000;
-        }
+	{
+	  inst_env->delay_slot_pc = inst_env->reg[REG_PC] & 0xFFFF0000;
+	}
       if (clear_size == INST_DWORD_SIZE)
-        {
-          inst_env->delay_slot_pc = 0x0;
-        }
+	{
+	  inst_env->delay_slot_pc = 0x0;
+	}
       /* The jump will be delayed with one delay slot.  So we need a delay 
-         slot.  */
+	 slot.  */
       inst_env->slot_needed = 1;
       inst_env->delay_slot_pc_active = 1;
     }
@@ -2672,7 +2672,7 @@ none_reg_mode_clear_test_op (unsigned short inst, inst_env_type *inst_env)
   if (inst_env->prefix_found)
     {
       /* The only way the PC can change is if this instruction is in
-         assign addressing mode.  */
+	 assign addressing mode.  */
       check_assign (inst, inst_env);
     }
   /* Indirect mode can't change the PC so just check if the mode is
@@ -2783,27 +2783,27 @@ none_reg_mode_jump_op (unsigned short inst, inst_env_type *inst_env)
     {
       /* Check if we have a prefix.  */
       if (inst_env->prefix_found)
-        {
-          check_assign (inst, inst_env);
-
-          /* Get the new value for the PC.  */
-          newpc = 
-            read_memory_unsigned_integer ((CORE_ADDR) inst_env->prefix_value,
-                                          4, inst_env->byte_order);
-        }
+	{
+	  check_assign (inst, inst_env);
+
+	  /* Get the new value for the PC.  */
+	  newpc = 
+	    read_memory_unsigned_integer ((CORE_ADDR) inst_env->prefix_value,
+					  4, inst_env->byte_order);
+	}
       else
-        {
-          /* Get the new value for the PC.  */
-          address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)];
-          newpc = read_memory_unsigned_integer (address,
+	{
+	  /* Get the new value for the PC.  */
+	  address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)];
+	  newpc = read_memory_unsigned_integer (address,
 						4, inst_env->byte_order);
 
-          /* Check if we should increment a register.  */
-          if (cris_get_mode (inst) == AUTOINC_MODE)
-            {
-              inst_env->reg[cris_get_operand1 (inst)] += 4;
-            }
-        }
+	  /* Check if we should increment a register.  */
+	  if (cris_get_mode (inst) == AUTOINC_MODE)
+	    {
+	      inst_env->reg[cris_get_operand1 (inst)] += 4;
+	    }
+	}
       inst_env->reg[REG_PC] = newpc;
     }
   inst_env->slot_needed = 0;
@@ -2821,45 +2821,45 @@ move_to_preg_op (struct gdbarch *gdbarch, unsigned short inst,
   if (inst_env->prefix_found)
     {
       /* The instruction has a prefix that means we are only interested if
-         the instruction is in assign mode.  */
+	 the instruction is in assign mode.  */
       if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)
-        {
-          /* The prefix handles the problem if we are in a delay slot.  */
-          if (cris_get_operand1 (inst) == REG_PC)
-            {
-              /* Just take care of the assign.  */
-              check_assign (inst, inst_env);
-            }
-        }
+	{
+	  /* The prefix handles the problem if we are in a delay slot.  */
+	  if (cris_get_operand1 (inst) == REG_PC)
+	    {
+	      /* Just take care of the assign.  */
+	      check_assign (inst, inst_env);
+	    }
+	}
     }
   else if (cris_get_mode (inst) == AUTOINC_MODE)
     {
       /* The instruction doesn't have a prefix, the only case left that we
-         are interested in is the autoincrement mode.  */
+	 are interested in is the autoincrement mode.  */
       if (cris_get_operand1 (inst) == REG_PC)
-        {
-          /* If the PC is to be incremented it's invalid to be in a 
-             delay slot.  */
-          if (inst_env->slot_needed)
-            {
-              inst_env->invalid = 1;
-              return;
-            }
-
-          /* The increment depends on the size of the special register.  */
-          if (cris_register_size (gdbarch, cris_get_operand2 (inst)) == 1)
-            {
-              process_autoincrement (INST_BYTE_SIZE, inst, inst_env);
-            }
-          else if (cris_register_size (gdbarch, cris_get_operand2 (inst)) == 2)
-            {
-              process_autoincrement (INST_WORD_SIZE, inst, inst_env);
-            }
-          else
-            {
-              process_autoincrement (INST_DWORD_SIZE, inst, inst_env);
-            }
-        }
+	{
+	  /* If the PC is to be incremented it's invalid to be in a 
+	     delay slot.  */
+	  if (inst_env->slot_needed)
+	    {
+	      inst_env->invalid = 1;
+	      return;
+	    }
+
+	  /* The increment depends on the size of the special register.  */
+	  if (cris_register_size (gdbarch, cris_get_operand2 (inst)) == 1)
+	    {
+	      process_autoincrement (INST_BYTE_SIZE, inst, inst_env);
+	    }
+	  else if (cris_register_size (gdbarch, cris_get_operand2 (inst)) == 2)
+	    {
+	      process_autoincrement (INST_WORD_SIZE, inst, inst_env);
+	    }
+	  else
+	    {
+	      process_autoincrement (INST_DWORD_SIZE, inst, inst_env);
+	    }
+	}
     }
   inst_env->slot_needed = 0;
   inst_env->prefix_found = 0;
@@ -2877,45 +2877,45 @@ none_reg_mode_move_from_preg_op (struct gdbarch *gdbarch, unsigned short inst,
   if (inst_env->prefix_found)
     {
       /* The instruction has a prefix that means we are only interested if
-         the instruction is in assign mode.  */
+	 the instruction is in assign mode.  */
       if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)
-        {
-          /* The prefix handles the problem if we are in a delay slot.  */
-          if (cris_get_operand1 (inst) == REG_PC)
-            {
-              /* Just take care of the assign.  */
-              check_assign (inst, inst_env);
-            }
-        }
+	{
+	  /* The prefix handles the problem if we are in a delay slot.  */
+	  if (cris_get_operand1 (inst) == REG_PC)
+	    {
+	      /* Just take care of the assign.  */
+	      check_assign (inst, inst_env);
+	    }
+	}
     }    
   /* The instruction doesn't have a prefix, the only case left that we
      are interested in is the autoincrement mode.  */
   else if (cris_get_mode (inst) == AUTOINC_MODE)
     {
       if (cris_get_operand1 (inst) == REG_PC)
-        {
-          /* If the PC is to be incremented it's invalid to be in a 
-             delay slot.  */
-          if (inst_env->slot_needed)
-            {
-              inst_env->invalid = 1;
-              return;
-            }
-          
-          /* The increment depends on the size of the special register.  */
-          if (cris_register_size (gdbarch, cris_get_operand2 (inst)) == 1)
-            {
-              process_autoincrement (INST_BYTE_SIZE, inst, inst_env);
-            }
-          else if (cris_register_size (gdbarch, cris_get_operand2 (inst)) == 2)
-            {
-              process_autoincrement (INST_WORD_SIZE, inst, inst_env);
-            }
-          else
-            {
-              process_autoincrement (INST_DWORD_SIZE, inst, inst_env);
-            }
-        }
+	{
+	  /* If the PC is to be incremented it's invalid to be in a 
+	     delay slot.  */
+	  if (inst_env->slot_needed)
+	    {
+	      inst_env->invalid = 1;
+	      return;
+	    }
+	  
+	  /* The increment depends on the size of the special register.  */
+	  if (cris_register_size (gdbarch, cris_get_operand2 (inst)) == 1)
+	    {
+	      process_autoincrement (INST_BYTE_SIZE, inst, inst_env);
+	    }
+	  else if (cris_register_size (gdbarch, cris_get_operand2 (inst)) == 2)
+	    {
+	      process_autoincrement (INST_WORD_SIZE, inst, inst_env);
+	    }
+	  else
+	    {
+	      process_autoincrement (INST_DWORD_SIZE, inst, inst_env);
+	    }
+	}
     }
   inst_env->slot_needed = 0;
   inst_env->prefix_found = 0;
@@ -2940,10 +2940,10 @@ reg_mode_move_from_preg_op (unsigned short inst, inst_env_type *inst_env)
     {
       /* It's invalid to change the PC in a delay slot.  */
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
       /* The destination is the PC, the jump will have a delay slot.  */
       inst_env->delay_slot_pc = inst_env->preg[cris_get_operand2 (inst)];
       inst_env->slot_needed = 1;
@@ -2967,50 +2967,50 @@ move_mem_to_reg_movem_op (unsigned short inst, inst_env_type *inst_env)
   if (inst_env->prefix_found)
     {
       /* The prefix handles the problem if we are in a delay slot.  Is the
-         MOVEM instruction going to change the PC?  */
+	 MOVEM instruction going to change the PC?  */
       if (cris_get_operand2 (inst) >= REG_PC)
-        {
-          inst_env->reg[REG_PC] = 
-            read_memory_unsigned_integer (inst_env->prefix_value,
+	{
+	  inst_env->reg[REG_PC] = 
+	    read_memory_unsigned_integer (inst_env->prefix_value,
 					  4, inst_env->byte_order);
-        }
+	}
       /* The assign value is the value after the increment.  Normally, the   
-         assign value is the value before the increment.  */
+	 assign value is the value before the increment.  */
       if ((cris_get_operand1 (inst) == REG_PC) 
-          && (cris_get_mode (inst) == PREFIX_ASSIGN_MODE))
-        {
-          inst_env->reg[REG_PC] = inst_env->prefix_value;
-          inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
-        }
+	  && (cris_get_mode (inst) == PREFIX_ASSIGN_MODE))
+	{
+	  inst_env->reg[REG_PC] = inst_env->prefix_value;
+	  inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
+	}
     }
   else
     {
       /* Is the MOVEM instruction going to change the PC?  */
       if (cris_get_operand2 (inst) == REG_PC)
-        {
-          /* It's invalid to change the PC in a delay slot.  */
-          if (inst_env->slot_needed)
-            {
-              inst_env->invalid = 1;
-              return;
-            }
-          inst_env->reg[REG_PC] =
-            read_memory_unsigned_integer (inst_env->reg[cris_get_operand1 (inst)], 
-                                          4, inst_env->byte_order);
-        }
+	{
+	  /* It's invalid to change the PC in a delay slot.  */
+	  if (inst_env->slot_needed)
+	    {
+	      inst_env->invalid = 1;
+	      return;
+	    }
+	  inst_env->reg[REG_PC] =
+	    read_memory_unsigned_integer (inst_env->reg[cris_get_operand1 (inst)], 
+					  4, inst_env->byte_order);
+	}
       /* The increment is not depending on the size, instead it's depending
-         on the number of registers loaded from memory.  */
+	 on the number of registers loaded from memory.  */
       if ((cris_get_operand1 (inst) == REG_PC)
 	  && (cris_get_mode (inst) == AUTOINC_MODE))
-        {
-          /* It's invalid to change the PC in a delay slot.  */
-          if (inst_env->slot_needed)
-            {
-              inst_env->invalid = 1;
-              return;
-            }
-          inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1); 
-        }
+	{
+	  /* It's invalid to change the PC in a delay slot.  */
+	  if (inst_env->slot_needed)
+	    {
+	      inst_env->invalid = 1;
+	      return;
+	    }
+	  inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1); 
+	}
     }
   inst_env->slot_needed = 0;
   inst_env->prefix_found = 0;
@@ -3026,30 +3026,30 @@ move_reg_to_mem_movem_op (unsigned short inst, inst_env_type *inst_env)
   if (inst_env->prefix_found)
     {
       /* The assign value is the value after the increment.  Normally, the
-         assign value is the value before the increment.  */
+	 assign value is the value before the increment.  */
       if ((cris_get_operand1 (inst) == REG_PC)
-          && (cris_get_mode (inst) == PREFIX_ASSIGN_MODE))
-        {
-          /* The prefix handles the problem if we are in a delay slot.  */
-          inst_env->reg[REG_PC] = inst_env->prefix_value;
-          inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
-        }
+	  && (cris_get_mode (inst) == PREFIX_ASSIGN_MODE))
+	{
+	  /* The prefix handles the problem if we are in a delay slot.  */
+	  inst_env->reg[REG_PC] = inst_env->prefix_value;
+	  inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
+	}
     }
   else
     {
       /* The increment is not depending on the size, instead it's depending
-         on the number of registers loaded to memory.  */
+	 on the number of registers loaded to memory.  */
       if ((cris_get_operand1 (inst) == REG_PC)
 	  && (cris_get_mode (inst) == AUTOINC_MODE))
-        {
-          /* It's invalid to change the PC in a delay slot.  */
-          if (inst_env->slot_needed)
-            {
-              inst_env->invalid = 1;
-              return;
-            }
-          inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
-        }
+	{
+	  /* It's invalid to change the PC in a delay slot.  */
+	  if (inst_env->slot_needed)
+	    {
+	      inst_env->invalid = 1;
+	      return;
+	    }
+	  inst_env->reg[REG_PC] += 4 * (cris_get_operand2 (inst) + 1);
+	}
     }
   inst_env->slot_needed = 0;
   inst_env->prefix_found = 0;
@@ -3083,10 +3083,10 @@ xor_op (unsigned short inst, inst_env_type *inst_env)
     {
       /* It's invalid to change the PC in a delay slot.  */
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
       inst_env->reg[REG_PC] ^= inst_env->reg[cris_get_operand1 (inst)];
     }
   inst_env->slot_needed = 0;
@@ -3148,7 +3148,7 @@ mulu_op (unsigned short inst, inst_env_type *inst_env)
 
 static void 
 add_sub_cmp_and_or_move_action (unsigned short inst, inst_env_type *inst_env, 
-                                unsigned long source1, unsigned long source2)
+				unsigned long source1, unsigned long source2)
 {
   unsigned long pc_mask;
   unsigned long operation_mask;
@@ -3240,11 +3240,11 @@ do_sign_or_zero_extend (unsigned long value, unsigned short *inst)
       value &= 0xFFFF;
 
       /* Check if the instruction is signed extend.  If so, check if value has
-         the sign bit on.  */
+	 the sign bit on.  */
       if (cris_is_signed_extend_bit_on (*inst) && (value & SIGNED_WORD_MASK))
-        {
-          value |= SIGNED_WORD_EXTEND_MASK;
-        } 
+	{
+	  value |= SIGNED_WORD_EXTEND_MASK;
+	} 
     }
   else
     {
@@ -3252,11 +3252,11 @@ do_sign_or_zero_extend (unsigned long value, unsigned short *inst)
       value &= 0xFF;
 
       /* Check if the instruction is signed extend.  If so, check if value has
-         the sign bit on.  */
+	 the sign bit on.  */
       if (cris_is_signed_extend_bit_on (*inst) && (value & SIGNED_BYTE_MASK))
-        {
-          value |= SIGNED_BYTE_EXTEND_MASK;
-        }
+	{
+	  value |= SIGNED_BYTE_EXTEND_MASK;
+	}
     }
   /* The size should now be dword.  */
   cris_set_size_to_dword (inst);
@@ -3268,7 +3268,7 @@ do_sign_or_zero_extend (unsigned long value, unsigned short *inst)
 
 static void 
 reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst,
-                                     inst_env_type *inst_env)
+				     inst_env_type *inst_env)
 {
   unsigned long operand1;
   unsigned long operand2;
@@ -3284,21 +3284,21 @@ reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst,
   if (cris_get_operand2 (inst) == REG_PC)
     {
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
       /* The instruction has the PC as its target register.  */
       operand1 = inst_env->reg[cris_get_operand1 (inst)]; 
       operand2 = inst_env->reg[REG_PC];
 
       /* Check if it's a extend, signed or zero instruction.  */
       if (cris_get_opcode (inst) < 4)
-        {
-          operand1 = do_sign_or_zero_extend (operand1, &inst);
-        }
+	{
+	  operand1 = do_sign_or_zero_extend (operand1, &inst);
+	}
       /* Calculate the PC value after the instruction, i.e. where the
-         breakpoint should be.  The order of the udw_operands is vital.  */
+	 breakpoint should be.  The order of the udw_operands is vital.  */
       add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1); 
     }
   inst_env->slot_needed = 0;
@@ -3342,7 +3342,7 @@ get_data_from_address (unsigned short *inst, CORE_ADDR address,
 
 static void 
 handle_prefix_assign_mode_for_aritm_op (unsigned short inst, 
-                                        inst_env_type *inst_env)
+					inst_env_type *inst_env)
 {
   unsigned long operand2;
   unsigned long operand3;
@@ -3357,7 +3357,7 @@ handle_prefix_assign_mode_for_aritm_op (unsigned short inst,
 					inst_env->byte_order);
 
       /* Calculate the PC value after the instruction, i.e. where the
-         breakpoint should be.  The order of the udw_operands is vital.  */
+	 breakpoint should be.  The order of the udw_operands is vital.  */
       add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3);
     }
   inst_env->slot_needed = 0;
@@ -3372,7 +3372,7 @@ handle_prefix_assign_mode_for_aritm_op (unsigned short inst,
 
 static void 
 three_operand_add_sub_cmp_and_or_op (unsigned short inst, 
-                                     inst_env_type *inst_env)
+				     inst_env_type *inst_env)
 {
   unsigned long operand2;
   unsigned long operand3;
@@ -3387,7 +3387,7 @@ three_operand_add_sub_cmp_and_or_op (unsigned short inst,
 					inst_env->byte_order);
 
       /* Calculate the PC value after the instruction, i.e. where the
-         breakpoint should be.  */
+	 breakpoint should be.  */
       add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3);
     }
   inst_env->slot_needed = 0;
@@ -3401,20 +3401,20 @@ three_operand_add_sub_cmp_and_or_op (unsigned short inst,
 
 static void 
 handle_prefix_index_mode_for_aritm_op (unsigned short inst, 
-                                       inst_env_type *inst_env)
+				       inst_env_type *inst_env)
 {
   if (cris_get_operand1 (inst) != cris_get_operand2 (inst))
     {
       /* If the instruction is MOVE it's invalid.  If the instruction is ADD,
-         SUB, AND or OR something weird is going on (if everything works these
-         instructions should end up in the three operand version).  */
+	 SUB, AND or OR something weird is going on (if everything works these
+	 instructions should end up in the three operand version).  */
       inst_env->invalid = 1;
       return;
     }
   else
     {
       /* three_operand_add_sub_cmp_and_or does the same as we should do here
-         so use it.  */
+	 so use it.  */
       three_operand_add_sub_cmp_and_or_op (inst, inst_env);
     }
   inst_env->slot_needed = 0;
@@ -3429,7 +3429,7 @@ handle_prefix_index_mode_for_aritm_op (unsigned short inst,
 
 static void 
 handle_inc_and_index_mode_for_aritm_op (unsigned short inst, 
-                                        inst_env_type *inst_env)
+					inst_env_type *inst_env)
 {
   unsigned long operand1;
   unsigned long operand2;
@@ -3441,7 +3441,7 @@ handle_inc_and_index_mode_for_aritm_op (unsigned short inst,
   if (cris_get_operand2 (inst) == REG_PC)
     {
       /* Must be done here, get_data_from_address may change the size 
-         field.  */
+	 field.  */
       size = cris_get_size (inst);
       operand2 = inst_env->reg[REG_PC];
 
@@ -3450,7 +3450,7 @@ handle_inc_and_index_mode_for_aritm_op (unsigned short inst,
       operand3 = get_data_from_address (&inst, operand1, inst_env->byte_order);
 
       /* Calculate the PC value after the instruction, i.e. where the
-         breakpoint should be.  The order of the udw_operands is vital.  */
+	 breakpoint should be.  The order of the udw_operands is vital.  */
       add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand3); 
     }
   /* If this is an autoincrement addressing mode, check if the increment
@@ -3462,11 +3462,11 @@ handle_inc_and_index_mode_for_aritm_op (unsigned short inst,
       size = cris_get_size (inst);
 
       /* If it's an extend instruction we don't want the signed extend bit,
-         because it influences the size.  */
+	 because it influences the size.  */
       if (cris_get_opcode (inst) < 4)
-        {
-          size &= ~SIGNED_EXTEND_BIT_MASK;
-        }
+	{
+	  size &= ~SIGNED_EXTEND_BIT_MASK;
+	}
       process_autoincrement (size, inst, inst_env);
     } 
   inst_env->slot_needed = 0;
@@ -3480,24 +3480,24 @@ handle_inc_and_index_mode_for_aritm_op (unsigned short inst,
 
 static void 
 none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst, 
-                                          inst_env_type *inst_env)
+					  inst_env_type *inst_env)
 {
   if (inst_env->prefix_found)
     {
       if (cris_get_mode (inst) == PREFIX_INDEX_MODE)
-        {
-          handle_prefix_index_mode_for_aritm_op (inst, inst_env);
-        }
+	{
+	  handle_prefix_index_mode_for_aritm_op (inst, inst_env);
+	}
       else if (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)
-        {
-          handle_prefix_assign_mode_for_aritm_op (inst, inst_env);
-        }
+	{
+	  handle_prefix_assign_mode_for_aritm_op (inst, inst_env);
+	}
       else
-        {
-          /* The mode is invalid for a prefixed base instruction.  */
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  /* The mode is invalid for a prefixed base instruction.  */
+	  inst_env->invalid = 1;
+	  return;
+	}
     }
   else
     {
@@ -3525,10 +3525,10 @@ quick_mode_add_sub_op (unsigned short inst, inst_env_type *inst_env)
   if (cris_get_operand2 (inst) == REG_PC)
     {
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
       operand1 = cris_get_quick_value (inst);
       operand2 = inst_env->reg[REG_PC];
 
@@ -3536,7 +3536,7 @@ quick_mode_add_sub_op (unsigned short inst, inst_env_type *inst_env)
       cris_set_size_to_dword (&inst);
 
       /* Calculate the PC value after the instruction, i.e. where the
-         breakpoint should be.  */
+	 breakpoint should be.  */
       add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1);
     }
   inst_env->slot_needed = 0;
@@ -3564,25 +3564,25 @@ quick_mode_and_cmp_move_or_op (unsigned short inst, inst_env_type *inst_env)
   if (cris_get_operand2 (inst) == REG_PC)
     {
       if (inst_env->slot_needed)
-        {
-          inst_env->invalid = 1;
-          return;
-        }
+	{
+	  inst_env->invalid = 1;
+	  return;
+	}
       /* The instruction has the PC as its target register.  */
       operand1 = cris_get_quick_value (inst);
       operand2 = inst_env->reg[REG_PC];
 
       /* The quick value is signed, so check if we must do a signed extend.  */
       if (operand1 & SIGNED_QUICK_VALUE_MASK)
-        {
-          /* sign extend  */
-          operand1 |= SIGNED_QUICK_VALUE_EXTEND_MASK;
-        }
+	{
+	  /* sign extend  */
+	  operand1 |= SIGNED_QUICK_VALUE_EXTEND_MASK;
+	}
       /* The size should now be dword.  */
       cris_set_size_to_dword (&inst);
 
       /* Calculate the PC value after the instruction, i.e. where the
-         breakpoint should be.  */
+	 breakpoint should be.  */
       add_sub_cmp_and_or_move_action (inst, inst_env, operand2, operand1);
     }
   inst_env->slot_needed = 0;
@@ -3864,11 +3864,11 @@ cris_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
   if (tdep != NULL)
     {
       fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_version = %i\n",
-                          tdep->cris_version);
+			  tdep->cris_version);
       fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_mode = %s\n",
-                          tdep->cris_mode);
+			  tdep->cris_mode);
       fprintf_unfiltered (file, "cris_dump_tdep: tdep->cris_dwarf2_cfi = %i\n",
-                          tdep->cris_dwarf2_cfi);
+			  tdep->cris_dwarf2_cfi);
     }
 }
 
@@ -3949,7 +3949,7 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 	   == usr_cmd_cris_mode)
 	  && (gdbarch_tdep (arches->gdbarch)->cris_dwarf2_cfi 
 	      == usr_cmd_cris_dwarf2_cfi))
-        return arches->gdbarch;
+	return arches->gdbarch;
     }
 
   /* No matching architecture was found.  Create a new one.  */
@@ -3991,7 +3991,7 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     case 10:
     case 11: 
       /* CRIS v10 and v11, a.k.a. ETRAX 100LX.  In addition to ETRAX 100, 
-         P7 (32 bits), and P15 (32 bits) have been implemented.  */
+	 P7 (32 bits), and P15 (32 bits) have been implemented.  */
       set_gdbarch_pc_regnum (gdbarch, 15);
       set_gdbarch_register_type (gdbarch, cris_register_type);
       /* There are 32 registers (some of which may not be implemented).  */