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author | Ian Lance Taylor <ian@airs.com> | 1995-01-17 19:08:31 +0000 |
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committer | Ian Lance Taylor <ian@airs.com> | 1995-01-17 19:08:31 +0000 |
commit | daa4c5f8a17f8d895d7f2981afea6cdb96dd8594 (patch) | |
tree | 78b5552122c76c8ff8d541f20adf1b6aa360c4c8 /gdb/config | |
parent | 5ad32be23cdaacdbf0205bcad7ced40d90250038 (diff) | |
download | gdb-daa4c5f8a17f8d895d7f2981afea6cdb96dd8594.zip gdb-daa4c5f8a17f8d895d7f2981afea6cdb96dd8594.tar.gz gdb-daa4c5f8a17f8d895d7f2981afea6cdb96dd8594.tar.bz2 |
* config/mips/tm-mips.h (enum mips_fpu_type): New enum.
(mips_fpu): Change type to enum mips_fpu_type.
(FIX_CALL_DUMMY): Handle mips_fpu == MIPS_FPU_SINGLE.
* mips-tdep.c (mips_fpu): Change type to enum mips_fpu_type.
Don't initialize.
(mips_fpu_string): New static variable.
(mips_push_dummy_frame): Handle mips_fpu == MIPS_FPU_SINGLE.
(mips_pop_frame): Likewise.
(mips_extract_return_value): Likewise.
(mips_store_return_value): Likewise.
(mips_set_fpu_command): New static function.
(mips_show_fpu_command): New static function.
(_initialize_mips_tdep): Change handling of set/show mipsfpu.
Diffstat (limited to 'gdb/config')
-rw-r--r-- | gdb/config/mips/tm-mips.h | 29 |
1 files changed, 25 insertions, 4 deletions
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h index cb20c68..8c93366 100644 --- a/gdb/config/mips/tm-mips.h +++ b/gdb/config/mips/tm-mips.h @@ -35,9 +35,18 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #define IEEE_FLOAT /* Some MIPS boards are provided both with and without a floating - point coprocessor; we provide a user settable variable to tell gdb - whether there is one or not. */ -extern int mips_fpu; + point coprocessor. The MIPS R4650 chip has only single precision + floating point. We provide a user settable variable to tell gdb + what type of floating point to use. */ + +enum mips_fpu_type +{ + MIPS_FPU_DOUBLE, /* Full double precision floating point. */ + MIPS_FPU_SINGLE, /* Single precision floating point (R4650). */ + MIPS_FPU_NONE /* No floating point. */ +}; + +extern enum mips_fpu_type mips_fpu; /* The name of the usual type of MIPS processor that is in the target system. */ @@ -370,7 +379,7 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *)); (dummyname + 12 * 4, 4, \ (extract_unsigned_integer (dummyname + 12 * 4, 4) \ | ((fun) & 0xffff))); \ - if (! mips_fpu) \ + if (mips_fpu == MIPS_FPU_NONE) \ { \ store_unsigned_integer (dummyname + 3 * 4, 4, \ (unsigned LONGEST) 0); \ @@ -381,6 +390,18 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *)); store_unsigned_integer (dummyname + 6 * 4, 4, \ (unsigned LONGEST) 0); \ } \ + else if (mips_fpu == MIPS_FPU_SINGLE) \ + { \ + /* This isn't right. mips_push_arguments will call \ + value_arg_coerce, which will convert all float arguments \ + to doubles. If the function prototype is float, though, \ + it will be expecting a float argument in a float \ + register. */ \ + store_unsigned_integer (dummyname + 4 * 4, 4, \ + (unsigned LONGEST) 0); \ + store_unsigned_integer (dummyname + 6 * 4, 4, \ + (unsigned LONGEST) 0); \ + } \ else if (TARGET_BYTE_ORDER == BIG_ENDIAN \ && ! GDB_TARGET_IS_MIPS64) \ { \ |