Assume TARGET_BYTE_ORDER_SELECTABLE{,_P} is always true.

10 files changed, 2 insertions, 20 deletions

diff --git a/gdb/config/arc/tm-arc.h b/gdb/config/arc/tm-arc.h
index a015843..52ed091 100644
--- a/gdb/config/arc/tm-arc.h
+++ b/gdb/config/arc/tm-arc.h
@@ -24,8 +24,8 @@
 /* Used by arc-tdep.c to set the default cpu type.  */
 #define DEFAULT_ARC_CPU_TYPE "base"
 
-/* Byte order is selectable.  */
-#define	TARGET_BYTE_ORDER_SELECTABLE
+/* We have IEEE floating point, if we have any float at all.  */
+#define IEEE_FLOAT (1)
 
 /* Offset from address of function to start of its code.
    Zero on most machines.  */
diff --git a/gdb/config/arm/tm-arm.h b/gdb/config/arm/tm-arm.h
index 80fc1f6..cd20548 100644
--- a/gdb/config/arm/tm-arm.h
+++ b/gdb/config/arm/tm-arm.h
@@ -31,7 +31,6 @@ struct value;
 
 /* Target byte order on ARM defaults to selectable, and defaults to
    little endian.  */
-#define TARGET_BYTE_ORDER_SELECTABLE_P	1
 #define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE
 
 /* IEEE format floating point.  */
diff --git a/gdb/config/arm/tm-linux.h b/gdb/config/arm/tm-linux.h
index 97520e7..51036b6 100644
--- a/gdb/config/arm/tm-linux.h
+++ b/gdb/config/arm/tm-linux.h
@@ -34,10 +34,6 @@
 extern struct link_map_offsets *arm_linux_svr4_fetch_link_map_offsets (void);
 #define SVR4_FETCH_LINK_MAP_OFFSETS() arm_linux_svr4_fetch_link_map_offsets ()
 
-/* Target byte order on ARM Linux is little endian and not selectable.  */
-#undef TARGET_BYTE_ORDER_SELECTABLE_P
-#define TARGET_BYTE_ORDER_SELECTABLE_P	0
-
 /* Under ARM Linux the traditional way of performing a breakpoint is to
    execute a particular software interrupt, rather than use a particular
    undefined instruction to provoke a trap.  Upon exection of the software
diff --git a/gdb/config/arm/tm-wince.h b/gdb/config/arm/tm-wince.h
index 40e58ba..82f97ad 100644
--- a/gdb/config/arm/tm-wince.h
+++ b/gdb/config/arm/tm-wince.h
@@ -31,8 +31,4 @@
 
 void wince_software_single_step (unsigned int, int);
 
-/* Target byte order is little endian and not selectable on WinCE. */
-#undef  TARGET_BYTE_ORDER_SELECTABLE_P
-#define TARGET_BYTE_ORDER_SELECTABLE_P	0
-
 #endif /* TM_WINCE_H */
diff --git a/gdb/config/mcore/tm-mcore.h b/gdb/config/mcore/tm-mcore.h
index 22631c0..80e438e 100644
--- a/gdb/config/mcore/tm-mcore.h
+++ b/gdb/config/mcore/tm-mcore.h
@@ -155,9 +155,6 @@ extern void mcore_virtual_frame_pointer (CORE_ADDR, int *, LONGEST *);
 #define TARGET_VIRTUAL_FRAME_POINTER(PC, REGP, OFFP) \
 	mcore_virtual_frame_pointer ((PC), (REGP), (OFFP))
 
-/* MCore can be bi-endian. */
-#define TARGET_BYTE_ORDER_SELECTABLE_P 1
-
 /* For PE, gcc will tell us what th real type of
    arguments are when it promotes arguments. */
 #define BELIEVE_PCC_PROMOTION 1
diff --git a/gdb/config/mips/tm-wince.h b/gdb/config/mips/tm-wince.h
index 737ccc6..f96c4fa 100644
--- a/gdb/config/mips/tm-wince.h
+++ b/gdb/config/mips/tm-wince.h
@@ -29,7 +29,6 @@
 #define SOFTWARE_SINGLE_STEP(sig, bp_p) wince_software_single_step (sig, bp_p)
 
 void wince_software_single_step (unsigned int, int);
-#undef TARGET_BYTE_ORDER_SELECTABLE
 #define TARGET_BYTE_ORDER BFD_ENDIAN_LITTLE
 
 #endif /* TM_WINCE_H */
diff --git a/gdb/config/powerpc/tm-ppc-eabi.h b/gdb/config/powerpc/tm-ppc-eabi.h
index 8830504..92e4127 100644
--- a/gdb/config/powerpc/tm-ppc-eabi.h
+++ b/gdb/config/powerpc/tm-ppc-eabi.h
@@ -39,8 +39,6 @@
 /* Say that we're using ELF, not XCOFF.  */
 #define ELF_OBJECT_FORMAT 1
 
-#define TARGET_BYTE_ORDER_SELECTABLE_P 1
-
 /* The value of symbols of type N_SO and N_FUN maybe null when 
    it shouldn't be. */
 #define SOFUN_ADDRESS_MAYBE_MISSING
diff --git a/gdb/config/sh/tm-wince.h b/gdb/config/sh/tm-wince.h
index ddebbd2..e939808 100644
--- a/gdb/config/sh/tm-wince.h
+++ b/gdb/config/sh/tm-wince.h
@@ -28,7 +28,6 @@
 #undef SOFTWARE_SINGLE_STEP
 #define SOFTWARE_SINGLE_STEP(sig, bp_p) wince_software_single_step (sig, bp_p)
 void wince_software_single_step (unsigned int, int);
-#undef TARGET_BYTE_ORDER_SELECTABLE
 #define TARGET_BYTE_ORDER BFD_ENDIAN_LITTLE
 
 #endif /* TM_WINCE_H */
diff --git a/gdb/config/sparc/tm-sparclet.h b/gdb/config/sparc/tm-sparclet.h
index 5382718..cc52d5a 100644
--- a/gdb/config/sparc/tm-sparclet.h
+++ b/gdb/config/sparc/tm-sparclet.h
@@ -49,7 +49,6 @@ enum {
 /* overrides of tm-sparc.h */
 
 #undef TARGET_BYTE_ORDER
-#define TARGET_BYTE_ORDER_SELECTABLE
 
 /* Sequence of bytes for breakpoint instruction (ta 1). */
 #undef BREAKPOINT
diff --git a/gdb/config/sparc/tm-sparclite.h b/gdb/config/sparc/tm-sparclite.h
index 71723f2..8fafe5e 100644
--- a/gdb/config/sparc/tm-sparclite.h
+++ b/gdb/config/sparc/tm-sparclite.h
@@ -45,7 +45,6 @@ enum {
 /* overrides of tm-sparc.h */
 
 #undef TARGET_BYTE_ORDER
-#define TARGET_BYTE_ORDER_SELECTABLE
 
 /* Select the sparclite disassembler.  Slightly different instruction set from
    the V8 sparc.  */