import gdb-1999-12-21 snapshot

23 files changed, 701 insertions, 339 deletions

diff --git a/gdb/config/alpha/alpha-linux.mh b/gdb/config/alpha/alpha-linux.mh
index 05e0cb6..3cbc3ee 100644
--- a/gdb/config/alpha/alpha-linux.mh
+++ b/gdb/config/alpha/alpha-linux.mh
@@ -3,7 +3,9 @@ XDEPFILES= ser-tcp.o
 XM_FILE= xm-alphalinux.h
 NAT_FILE= nm-linux.h
 NATDEPFILES= infptrace.o inftarg.o corelow.o core-regset.o alpha-nat.o \
-	fork-child.o solib.o linux-thread.o
+	fork-child.o solib.o linux-thread.o lin-thread.o 
+
+LOADLIBES = -ldl -rdynamic
 
 MMALLOC = 
 MMALLOC_CFLAGS = -DNO_MMALLOC 
diff --git a/gdb/config/alpha/nm-linux.h b/gdb/config/alpha/nm-linux.h
index 49b4fc3..979b817 100644
--- a/gdb/config/alpha/nm-linux.h
+++ b/gdb/config/alpha/nm-linux.h
@@ -18,6 +18,9 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
+#ifndef NM_LINUX_H
+#define NM_LINUX_H
+
 #include "nm-linux.h"
 
 /* Figure out where the longjmp will land.  We expect that we have just entered
@@ -64,3 +67,4 @@ get_longjmp_target PARAMS ((CORE_ADDR *));
    pointer to the first register.  */
 #define ALPHA_REGSET_BASE(regsetp)  ((long *) (regsetp))
 
+#endif /* NM_LINUX_H */
diff --git a/gdb/config/arm/arm.mh b/gdb/config/arm/arm.mh
index 4fcf0de..60381f0 100644
--- a/gdb/config/arm/arm.mh
+++ b/gdb/config/arm/arm.mh
@@ -1,5 +1,6 @@
-# Host: Acorn RISC machine running RISCiX (4.3bsd)
-XDEPFILES= infptrace.o inftarg.o fork-child.o arm-xdep.o arm-convert.o 
-XM_FILE= xm-arm.h
-
-NAT_FILE= nm-arm.h
+# OBSOLETE # Host: Acorn RISC machine running RISCiX (4.3bsd)
+# OBSOLETE XDEPFILES= infptrace.o inftarg.o fork-child.o arm-xdep.o arm-convert.o 
+# OBSOLETE 
+# OBSOLETE XM_FILE= xm-arm.h
+# OBSOLETE 
+# OBSOLETE NAT_FILE= nm-arm.h
diff --git a/gdb/config/arm/arm.mt b/gdb/config/arm/arm.mt
index f6f16a3..ef34aa5 100644
--- a/gdb/config/arm/arm.mt
+++ b/gdb/config/arm/arm.mt
@@ -1,7 +1,7 @@
-# Target: Acorn RISC machine (ARM) with simulator
-TDEPFILES= arm-tdep.o remote-rdp.o remote-rdi.o
-TDEPLIBS= rdi-share/libangsd.a
-TM_FILE= tm-arm.h
-
-SIM_OBS = remote-sim.o
-SIM = ../sim/arm/libsim.a
+# OBSOLETE # Target: Acorn RISC machine (ARM) with simulator
+# OBSOLETE TDEPFILES= arm-tdep.o remote-rdp.o remote-rdi.oT
+# OBSOLETE DEPLIBS= rdi-share/libangsd.a
+# OBSOLETE TM_FILE= tm-arm.h
+# OBSOLETE 
+# OBSOLETE SIM_OBS = remote-sim.o
+# OBSOLETE SIM = ../sim/arm/libsim.a
diff --git a/gdb/config/arm/embed.mt b/gdb/config/arm/embed.mt
new file mode 100644
index 0000000..c854d17
--- /dev/null
+++ b/gdb/config/arm/embed.mt
@@ -0,0 +1,7 @@
+# Target: ARM embedded system
+TDEPFILES= arm-tdep.o remote-rdp.o remote-rdi.o
+TDEPLIBS= rdi-share/libangsd.a
+TM_FILE= tm-embed.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/arm/libsim.a
diff --git a/gdb/config/arm/linux.mh b/gdb/config/arm/linux.mh
new file mode 100644
index 0000000..3c6dccc
--- /dev/null
+++ b/gdb/config/arm/linux.mh
@@ -0,0 +1,8 @@
+# Host: ARM based machine running GNU/Linux
+
+XM_FILE= xm-linux.h
+XDEPFILES= ser-tcp.o
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o solib.o inftarg.o fork-child.o corelow.o \
+	     core-aout.o core-regset.o arm-linux-nat.o
diff --git a/gdb/config/arm/linux.mt b/gdb/config/arm/linux.mt
new file mode 100644
index 0000000..b85ae48
--- /dev/null
+++ b/gdb/config/arm/linux.mt
@@ -0,0 +1,5 @@
+# Target: ARM based machine running GNU/Linux
+TM_FILE= tm-linux.h
+TDEPFILES= arm-tdep.o
+
+GDBSERVER_DEPFILES= low-linux.o
diff --git a/gdb/config/arm/nm-arm.h b/gdb/config/arm/nm-arm.h
index 45ef76c..06ba837 100644
--- a/gdb/config/arm/nm-arm.h
+++ b/gdb/config/arm/nm-arm.h
@@ -1,28 +1,28 @@
-/* Definitions to make GDB run on an ARM under RISCiX (4.3bsd).
-   Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place - Suite 330,
-   Boston, MA 02111-1307, USA.  */
-
-/* This is the amount to subtract from u.u_ar0
-   to get the offset in the core file of the register values.  */
-
-#define KERNEL_U_ADDR (0x01000000 - (UPAGES * NBPG))
-
-/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
-#define FETCH_INFERIOR_REGISTERS
-#define HOST_BYTE_ORDER LITTLE_ENDIAN
+/* OBSOLETE /* Definitions to make GDB run on an ARM under RISCiX (4.3bsd). */
+/* OBSOLETE    Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc. */
+/* OBSOLETE  */
+/* OBSOLETE    This file is part of GDB. */
+/* OBSOLETE  */
+/* OBSOLETE    This program is free software; you can redistribute it and/or modify */
+/* OBSOLETE    it under the terms of the GNU General Public License as published by */
+/* OBSOLETE    the Free Software Foundation; either version 2 of the License, or */
+/* OBSOLETE    (at your option) any later version. */
+/* OBSOLETE  */
+/* OBSOLETE    This program is distributed in the hope that it will be useful, */
+/* OBSOLETE    but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* OBSOLETE    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the */
+/* OBSOLETE    GNU General Public License for more details. */
+/* OBSOLETE  */
+/* OBSOLETE    You should have received a copy of the GNU General Public License */
+/* OBSOLETE    along with this program; if not, write to the Free Software */
+/* OBSOLETE    Foundation, Inc., 59 Temple Place - Suite 330, */
+/* OBSOLETE    Boston, MA 02111-1307, USA.  *x/ */
+/* OBSOLETE  */
+/* OBSOLETE /* This is the amount to subtract from u.u_ar0 */
+/* OBSOLETE    to get the offset in the core file of the register values.  *x/ */
+/* OBSOLETE  */
+/* OBSOLETE #define KERNEL_U_ADDR (0x01000000 - (UPAGES * NBPG)) */
+/* OBSOLETE  */
+/* OBSOLETE /* Override copies of {fetch,store}_inferior_registers in infptrace.c.  *x/ */
+/* OBSOLETE #define FETCH_INFERIOR_REGISTERS */
+/* OBSOLETE #define HOST_BYTE_ORDER LITTLE_ENDIAN */
diff --git a/gdb/config/arm/nm-linux.h b/gdb/config/arm/nm-linux.h
new file mode 100644
index 0000000..125d72f
--- /dev/null
+++ b/gdb/config/arm/nm-linux.h
@@ -0,0 +1,46 @@
+/* Definitions to make GDB run on an ARM based machine under GNU/Linux.
+   Copyright 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_ARMLINUX_H
+#define NM_ARMLINUX_H
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+extern int kernel_u_size (void);
+#define KERNEL_U_SIZE	arm_linux_kernel_u_size()
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* Tell gdb that we can attach and detach other processes.  */
+#define ATTACH_DETACH
+
+extern int arm_register_u_addr (int, int);
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	{ (addr) = arm_linux_register_u_addr((blockend), (regno)); }
+
+/* We define this if link.h is available, because with ELF we use SVR4 style
+   shared libraries. */
+
+#ifdef HAVE_LINK_H
+#define SVR4_SHARED_LIBS
+#include "solib.h"		/* Support for shared libraries. */
+#endif
+
+#endif /* NM_ARMLINUX_H */
diff --git a/gdb/config/arm/tm-arm.h b/gdb/config/arm/tm-arm.h
index d33477d..fb7f7b9 100644
--- a/gdb/config/arm/tm-arm.h
+++ b/gdb/config/arm/tm-arm.h
@@ -1,4 +1,4 @@
-/* Definitions to make GDB target for an ARM
+/* Definitions to target GDB to ARM targets.
    Copyright 1986-1989, 1991, 1993-1999 Free Software Foundation, Inc.
 
    This file is part of GDB.
@@ -18,120 +18,168 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-/* Forward decls for prototypes */
+#ifndef TM_ARM_H
+#define TM_ARM_H
+
+/* Forward declarations for prototypes.  */
 struct type;
 struct value;
 
 #define TARGET_BYTE_ORDER_SELECTABLE
 
-/* IEEE format floating point */
+/* Target byte order on ARM defaults to selectable, and defaults to
+   little endian.  */
+#define TARGET_BYTE_ORDER_SELECTABLE_P		1
+#define TARGET_BYTE_ORDER_DEFAULT	LITTLE_ENDIAN
 
+/* IEEE format floating point.  */
 #define IEEE_FLOAT
+#define TARGET_DOUBLE_FORMAT  (target_byte_order == BIG_ENDIAN \
+			       ? &floatformat_ieee_double_big	 \
+			       : &floatformat_ieee_double_littlebyte_bigword)
 
-/* FIXME: may need a floatformat_ieee_double_bigbyte_littleword format for
-   BIG_ENDIAN use. -fnf */
-
-#define TARGET_DOUBLE_FORMAT (target_byte_order == BIG_ENDIAN \
-			      ? &floatformat_ieee_double_big \
-			      : &floatformat_ieee_double_littlebyte_bigword)
-
-/* When reading symbols, we need to zap the low bit of the address, which
-   may be set to 1 for Thumb functions.  */
+/* When reading symbols, we need to zap the low bit of the address,
+   which may be set to 1 for Thumb functions.  */
 
 #define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x1)
 
 /* Remove useless bits from addresses in a running program.  */
 
-CORE_ADDR arm_addr_bits_remove PARAMS ((CORE_ADDR));
+CORE_ADDR arm_addr_bits_remove (CORE_ADDR);
 
-#define ADDR_BITS_REMOVE(val) (arm_addr_bits_remove (val))
+#define ADDR_BITS_REMOVE(val)	(arm_addr_bits_remove (val))
 
-/* Offset from address of function to start of its code.
-   Zero on most machines.  */
+/* Offset from address of function to start of its code.  Zero on most
+   machines.  */
 
-#define FUNCTION_START_OFFSET 0
+#define FUNCTION_START_OFFSET	0
 
-/* Advance PC across any function entry prologue instructions
-   to reach some "real" code.  */
+/* Advance PC across any function entry prologue instructions to reach
+   some "real" code.  */
 
-extern CORE_ADDR arm_skip_prologue PARAMS ((CORE_ADDR pc));
+extern CORE_ADDR arm_skip_prologue (CORE_ADDR pc);
 
-#define SKIP_PROLOGUE(pc) (arm_skip_prologue (pc))
+#define SKIP_PROLOGUE(pc)  (arm_skip_prologue (pc))
 
-/* Immediately after a function call, return the saved pc.
-   Can't always go through the frames for this because on some machines
-   the new frame is not set up until the new function executes
-   some instructions.  */
+/* Immediately after a function call, return the saved pc.  Can't
+   always go through the frames for this because on some machines the
+   new frame is not set up until the new function executes some
+   instructions.  */
 
-#define SAVED_PC_AFTER_CALL(frame) arm_saved_pc_after_call (frame)
+#define SAVED_PC_AFTER_CALL(frame)  arm_saved_pc_after_call (frame)
 struct frame_info;
-extern CORE_ADDR arm_saved_pc_after_call PARAMS ((struct frame_info *));
-
-/* I don't know the real values for these.  */
-#define TARGET_UPAGES UPAGES
-#define TARGET_NBPG NBPG
-
-/* Address of end of stack space.  */
-
-#define STACK_END_ADDR (0x01000000 - (TARGET_UPAGES * TARGET_NBPG))
+extern CORE_ADDR arm_saved_pc_after_call (struct frame_info *);
+
+/* The following define instruction sequences that will cause ARM
+   cpu's to take an undefined instruction trap.  These are used to
+   signal a breakpoint to GDB.
+   
+   The newer ARMv4T cpu's are capable of operating in ARM or Thumb
+   modes.  A different instruction is required for each mode.  The ARM
+   cpu's can also be big or little endian.  Thus four different
+   instructions are needed to support all cases.
+   
+   Note: ARMv4 defines several new instructions that will take the
+   undefined instruction trap.  ARM7TDMI is nominally ARMv4T, but does
+   not in fact add the new instructions.  The new undefined
+   instructions in ARMv4 are all instructions that had no defined
+   behaviour in earlier chips.  There is no guarantee that they will
+   raise an exception, but may be treated as NOP's.  In practice, it
+   may only safe to rely on instructions matching:
+   
+   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 
+   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
+   
+   Even this may only true if the condition predicate is true. The
+   following use a condition predicate of ALWAYS so it is always TRUE.
+   
+   There are other ways of forcing a breakpoint.  ARM Linux, RisciX,
+   and I suspect NetBSD will all use a software interrupt rather than
+   an undefined instruction to force a trap.  This can be handled by
+   redefining some or all of the following in a target dependent
+   fashion.  */
+
+#define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
+#define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
+#define THUMB_LE_BREAKPOINT {0xfe,0xdf}
+#define THUMB_BE_BREAKPOINT {0xdf,0xfe}
 
 /* Stack grows downward.  */
 
 #define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
 
-/* !!!! if we're using RDP, then we're inserting breakpoints and storing
-   their handles instread of what was in memory.  It is nice that
-   this is the same size as a handle - otherwise remote-rdp will
+/* !!!! if we're using RDP, then we're inserting breakpoints and
+   storing their handles instread of what was in memory.  It is nice
+   that this is the same size as a handle - otherwise remote-rdp will
    have to change. */
 
-/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a
-   16- or 32-bit breakpoint should be used.  It returns a pointer
-   to a string of bytes that encode a breakpoint instruction, stores
-   the length of the string to *lenptr, and adjusts the pc (if necessary) to
-   point to the actual memory location where the breakpoint should be
-   inserted.  */
+/* BREAKPOINT_FROM_PC uses the program counter value to determine
+   whether a 16- or 32-bit breakpoint should be used.  It returns a
+   pointer to a string of bytes that encode a breakpoint instruction,
+   stores the length of the string to *lenptr, and adjusts the pc (if
+   necessary) to point to the actual memory location where the
+   breakpoint should be inserted.  */
 
 extern breakpoint_from_pc_fn arm_breakpoint_from_pc;
 #define BREAKPOINT_FROM_PC(pcptr, lenptr) arm_breakpoint_from_pc (pcptr, lenptr)
 
-/* Amount PC must be decremented by after a breakpoint.
-   This is often the number of bytes in BREAKPOINT
-   but not always.  */
+/* Amount PC must be decremented by after a breakpoint.  This is often
+   the number of bytes in BREAKPOINT but not always.  */
 
 #define DECR_PC_AFTER_BREAK 0
 
-/* code to execute to print interesting information about the
- * floating point processor (if any)
- * No need to define if there is nothing to do.
- */
+/* Code to execute to print interesting information about the floating
+   point processor (if any) or emulator.  No need to define if there
+   is nothing to do. */
 extern void arm_float_info (void);
 
-#define FLOAT_INFO { arm_float_info (); }
+#define FLOAT_INFO	{ arm_float_info (); }
 
 /* Say how long (ordinary) registers are.  This is a piece of bogosity
    used in push_word and a few other places; REGISTER_RAW_SIZE is the
    real way to know how big a register is.  */
 
-#define REGISTER_SIZE 4
-
-/* Number of machine registers */
-
-/* Note: I make a fake copy of the pc in register 25 (calling it ps) so
-   that I can clear the status bits from pc (register 15) */
-
-#define NUM_REGS 26
+#define REGISTER_SIZE	4
+
+/* Say how long FP registers are.  Used for documentation purposes and
+   code readability in this header.  IEEE extended doubles are 80
+   bits.  DWORD aligned they use 96 bits.  */
+#define FP_REGISTER_RAW_SIZE	12
+
+/* GCC doesn't support long doubles (extended IEEE values).  The FP
+   register virtual size is therefore 64 bits.  Used for documentation
+   purposes and code readability in this header.  */
+#define FP_REGISTER_VIRTUAL_SIZE	8
+
+/* Status registers are the same size as general purpose registers.
+   Used for documentation purposes and code readability in this
+   header.  */
+#define STATUS_REGISTER_SIZE	REGISTER_SIZE
+
+/* Number of machine registers.  The only define actually required 
+   is NUM_REGS.  The other definitions are used for documentation
+   purposes and code readability.  */
+/* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS)
+   (and called PS for processor status) so the status bits can be cleared
+   from the PC (register 15).  For 32 bit ARM code, a copy of CPSR is placed
+   in PS.  */
+#define NUM_FREGS	8	/* Number of floating point registers.  */
+#define NUM_SREGS	2	/* Number of status registers.  */
+#define NUM_GREGS	16	/* Number of general purpose registers.  */
+#define NUM_REGS	(NUM_GREGS + NUM_FREGS + NUM_SREGS)
 
 /* An array of names of registers. */
-
 extern char **arm_register_names;
+
 #define REGISTER_NAME(i) arm_register_names[i]
 
-/* Register numbers of various important registers.
-   Note that some of these values are "real" register numbers,
-   and correspond to the general registers of the machine,
-   and some are "phony" register numbers which are too large
-   to be actual register numbers as far as the user is concerned
-   but do serve to get the desired values when passed to read_register.  */
+/* Register numbers of various important registers.  Note that some of
+   these values are "real" register numbers, and correspond to the
+   general registers of the machine, and some are "phony" register
+   numbers which are too large to be actual register numbers as far as
+   the user is concerned but do serve to get the desired values when
+   passed to read_register.  */
 
 #define A1_REGNUM 0		/* first integer-like argument */
 #define A4_REGNUM 3		/* last integer-like argument */
@@ -180,88 +228,97 @@ extern char **arm_register_names;
 
 /* Total amount of space needed to store our copies of the machine's
    register state, the array `registers'.  */
-#define REGISTER_BYTES (16*4 + 12*8 + 4 + 4)
+
+#define REGISTER_BYTES ((NUM_GREGS * REGISTER_SIZE) + \
+			(NUM_FREGS * FP_REGISTER_RAW_SIZE) + \
+			(NUM_SREGS * STATUS_REGISTER_SIZE))
 
 /* Index within `registers' of the first byte of the space for
    register N.  */
 
-#define REGISTER_BYTE(N) (((N) < F0_REGNUM) ? (N)*4 : \
-			  (((N) < PS_REGNUM) ? 16*4 + ((N) - 16)*12 : \
-			   16*4 + 8*12 + ((N) - FPS_REGNUM) * 4))
-
-/* Number of bytes of storage in the actual machine representation
-   for register N.  On the vax, all regs are 4 bytes.  */
-
-#define REGISTER_RAW_SIZE(N) (((N) < F0_REGNUM || (N) >= FPS_REGNUM) ? 4 : 12)
-
-/* Number of bytes of storage in the program's representation
-   for register N.  On the vax, all regs are 4 bytes.  */
-
-#define REGISTER_VIRTUAL_SIZE(N) (((N) < F0_REGNUM || (N) >= FPS_REGNUM) ? 4 : 8)
+#define REGISTER_BYTE(N) \
+     ((N) < F0_REGNUM \
+      ? (N) * REGISTER_SIZE \
+      : ((N) < PS_REGNUM \
+	 ? (NUM_GREGS * REGISTER_SIZE + \
+	    ((N) - F0_REGNUM) * FP_REGISTER_RAW_SIZE) \
+	 : (NUM_GREGS * REGISTER_SIZE + \
+	    NUM_FREGS * FP_REGISTER_RAW_SIZE + \
+	    ((N) - FPS_REGNUM) * STATUS_REGISTER_SIZE)))
+
+/* Number of bytes of storage in the actual machine representation for
+   register N.  All registers are 4 bytes, except fp0 - fp7, which are
+   12 bytes in length.  */
+#define REGISTER_RAW_SIZE(N) \
+     ((N) < F0_REGNUM ? REGISTER_SIZE : \
+      (N) < FPS_REGNUM ? FP_REGISTER_RAW_SIZE : STATUS_REGISTER_SIZE)
+
+/* Number of bytes of storage in a program's representation
+   for register N.  */
+#define REGISTER_VIRTUAL_SIZE(N) \
+	((N) < F0_REGNUM ? REGISTER_SIZE : \
+	 (N) < FPS_REGNUM ? FP_REGISTER_VIRTUAL_SIZE : STATUS_REGISTER_SIZE)
 
 /* Largest value REGISTER_RAW_SIZE can have.  */
 
-#define MAX_REGISTER_RAW_SIZE 12
+#define MAX_REGISTER_RAW_SIZE FP_REGISTER_RAW_SIZE
 
 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+#define MAX_REGISTER_VIRTUAL_SIZE FP_REGISTER_VIRTUAL_SIZE
 
-#define MAX_REGISTER_VIRTUAL_SIZE 8
-
-/* Nonzero if register N requires conversion
-   from raw format to virtual format.  */
-#define REGISTER_CONVERTIBLE(N) ((unsigned)(N) - F0_REGNUM < 8)
-
-/* Convert data from raw format for register REGNUM in buffer FROM
-   to virtual format with type TYPE in buffer TO.  */
+/* Nonzero if register N requires conversion from raw format to
+   virtual format. */
+extern int arm_register_convertible (unsigned int);
+#define REGISTER_CONVERTIBLE(REGNUM) (arm_register_convertible (REGNUM))
 
-void convert_from_extended (void *ptr, /*double*/void *dbl);
+/* Convert data from raw format for register REGNUM in buffer FROM to
+   virtual format with type TYPE in buffer TO. */
 
+extern void arm_register_convert_to_virtual (unsigned int regnum,
+					     struct type *type,
+					     void *from, void *to);
 #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
-{ \
-  double val; \
-  convert_from_extended ((FROM), & val); \
-  store_floating ((TO), TYPE_LENGTH (TYPE), val); \
-}
+     arm_register_convert_to_virtual (REGNUM, TYPE, FROM, TO)
 
-/* Convert data from virtual format with type TYPE in buffer FROM
-   to raw format for register REGNUM in buffer TO.  */
+/* Convert data from virtual format with type TYPE in buffer FROM to
+   raw format for register REGNUM in buffer TO.  */
 
-extern void convert_to_extended (void *ptr, /*double*/void *dbl);
+extern void arm_register_convert_to_raw (unsigned int regnum,
+					 struct type *type,
+					 void *from, void *to);
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+     arm_register_convert_to_raw (REGNUM, TYPE, FROM, TO)
 
-#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO)	\
-{ \
-  double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
-  convert_to_extended (&val, (TO)); \
-}
-/* Return the GDB type object for the "standard" data type
-   of data in register N.  */
+/* Return the GDB type object for the "standard" data type of data in
+   register N.  */
 
 #define REGISTER_VIRTUAL_TYPE(N) \
- (((unsigned)(N) - F0_REGNUM) < 8 ? builtin_type_double : builtin_type_int)
-
+     (((unsigned)(N) - F0_REGNUM) < NUM_FREGS \
+      ? builtin_type_double : builtin_type_int)
+
 /* The system C compiler uses a similar structure return convention to gcc */
 extern use_struct_convention_fn arm_use_struct_convention;
-#define USE_STRUCT_CONVENTION(gcc_p, type) arm_use_struct_convention (gcc_p, type)
+#define USE_STRUCT_CONVENTION(gcc_p, type) \
+     arm_use_struct_convention (gcc_p, type)
 
 /* Store the address of the place in which to copy the structure the
    subroutine will return.  This is called from call_function. */
 
 #define STORE_STRUCT_RETURN(ADDR, SP) \
-  { write_register (0, (ADDR)); }
+     write_register (A1_REGNUM, (ADDR))
 
-/* Extract from an array REGBUF containing the (raw) register state
-   a function return value of type TYPE, and copy that, in virtual format,
-   into VALBUF.  */
+/* Extract from an array REGBUF containing the (raw) register state a
+   function return value of type TYPE, and copy that, in virtual
+   format, into VALBUF.  */
 
+extern void arm_extract_return_value (struct type *, char[], char *);
 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
-  if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)				\
-    convert_from_extended (REGBUF + REGISTER_BYTE (F0_REGNUM), VALBUF);	\
-  else									\
-    memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE))
+     arm_extract_return_value ((TYPE), (REGBUF), (VALBUF))
 
-/* Write into appropriate registers a function return value
-   of type TYPE, given in virtual format.  */
+/* Write into appropriate registers a function return value of type
+   TYPE, given in virtual format.  */
 
+extern void convert_to_extended (void *dbl, void *ptr);
 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
   if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) {				\
     char _buf[MAX_REGISTER_RAW_SIZE];					\
@@ -275,7 +332,7 @@ extern use_struct_convention_fn arm_use_struct_convention;
    as a CORE_ADDR (or an expression that can be used as one).  */
 
 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
-  (extract_address ((PTR) (REGBUF), REGISTER_RAW_SIZE(0)))
+  (extract_address ((PTR)(REGBUF), REGISTER_RAW_SIZE(0)))
 
 /* Specify that for the native compiler variables for a particular
    lexical context are listed after the beginning LBRAC instead of
@@ -283,11 +340,11 @@ extern use_struct_convention_fn arm_use_struct_convention;
 #define VARIABLES_INSIDE_BLOCK(desc, gcc_p) (!(gcc_p))
 
 
-/* Define other aspects of the stack frame. 
-   We keep the offsets of all saved registers, 'cause we need 'em a lot!
-   We also keep the current size of the stack frame, and the offset of
-   the frame pointer from the stack pointer (for frameless functions, and
-   when we're still in the prologue of a function with a frame) */
+/* Define other aspects of the stack frame.  We keep the offsets of
+   all saved registers, 'cause we need 'em a lot!  We also keep the
+   current size of the stack frame, and the offset of the frame
+   pointer from the stack pointer (for frameless functions, and when
+   we're still in the prologue of a function with a frame) */
 
 #define EXTRA_FRAME_INFO  	\
   struct frame_saved_regs fsr;	\
@@ -295,29 +352,29 @@ extern use_struct_convention_fn arm_use_struct_convention;
   int frameoffset;		\
   int framereg;
 
-extern void arm_init_extra_frame_info PARAMS ((int fromleaf,
-					       struct frame_info *fi));
+extern void arm_init_extra_frame_info (int fromleaf, struct frame_info * fi);
 #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
-  arm_init_extra_frame_info (fromleaf, fi)
+	arm_init_extra_frame_info ((fromleaf), (fi))
 
 /* Return the frame address.  On ARM, it is R11; on Thumb it is R7.  */
-CORE_ADDR arm_target_read_fp PARAMS ((void));
+CORE_ADDR arm_target_read_fp (void);
 #define TARGET_READ_FP() arm_target_read_fp ()
 
-/* Describe the pointer in each stack frame to the previous stack frame
-   (its caller).  */
+/* Describe the pointer in each stack frame to the previous stack
+   frame (its caller).  */
 
-/* FRAME_CHAIN takes a frame's nominal address
-   and produces the frame's chain-pointer.
+/* FRAME_CHAIN takes a frame's nominal address and produces the
+   frame's chain-pointer.
 
    However, if FRAME_CHAIN_VALID returns zero,
    it means the given frame is the outermost one and has no caller.  */
 
-#define FRAME_CHAIN(thisframe) (CORE_ADDR) arm_frame_chain (thisframe)
-extern CORE_ADDR arm_frame_chain PARAMS ((struct frame_info *));
+#define FRAME_CHAIN(thisframe) arm_frame_chain (thisframe)
+extern CORE_ADDR arm_frame_chain (struct frame_info *);
 
-extern int arm_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
-#define FRAME_CHAIN_VALID(chain, thisframe) arm_frame_chain_valid (chain, thisframe)
+extern int arm_frame_chain_valid (CORE_ADDR, struct frame_info *);
+#define FRAME_CHAIN_VALID(chain, thisframe) \
+     arm_frame_chain_valid (chain, thisframe)
 
 /* Define other aspects of the stack frame.  */
 
@@ -325,14 +382,14 @@ extern int arm_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
    by FI does not have a frame on the stack associated with it.  If it
    does not, FRAMELESS is set to 1, else 0.
 
-   Sometimes we have functions that do a little setup (like saving the vN
-   registers with the stmdb instruction, but DO NOT set up a frame.
+   Sometimes we have functions that do a little setup (like saving the
+   vN registers with the stmdb instruction, but DO NOT set up a frame.
    The symbol table will report this as a prologue.  However, it is
-   important not to try to parse these partial frames as frames, or we 
+   important not to try to parse these partial frames as frames, or we
    will get really confused.
 
-   So I will demand 3 instructions between the start & end of the prologue
-   before I call it a real prologue, i.e. at least
+   So I will demand 3 instructions between the start & end of the
+   prologue before I call it a real prologue, i.e. at least
          mov ip, sp,
 	 stmdb sp!, {}
 	 sub sp, ip, #4. */
@@ -340,11 +397,11 @@ extern int arm_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
 extern int arm_frameless_function_invocation (struct frame_info *fi);
 #define FRAMELESS_FUNCTION_INVOCATION(FI) \
 (arm_frameless_function_invocation (FI))
-     
+    
 /* Saved Pc.  */
 
 #define FRAME_SAVED_PC(FRAME)	arm_frame_saved_pc (FRAME)
-extern CORE_ADDR arm_frame_saved_pc PARAMS ((struct frame_info *));
+extern CORE_ADDR arm_frame_saved_pc (struct frame_info *);
 
 #define FRAME_ARGS_ADDRESS(fi) (fi->frame)
 
@@ -355,15 +412,15 @@ extern CORE_ADDR arm_frame_saved_pc PARAMS ((struct frame_info *));
 
 #define FRAME_NUM_ARGS(fi) (-1)
 
-/* Return number of bytes at start of arglist that are not really args.  */
+/* Return number of bytes at start of arglist that are not really args. */
 
 #define FRAME_ARGS_SKIP 0
 
-/* Put here the code to store, into a struct frame_saved_regs,
-   the addresses of the saved registers of frame described by FRAME_INFO.
+/* Put here the code to store, into a struct frame_saved_regs, the
+   addresses of the saved registers of frame described by FRAME_INFO.
    This includes special registers such as pc and fp saved in special
-   ways in the stack frame.  sp is even more special:
-   the address we return for it IS the sp for the next frame.  */
+   ways in the stack frame.  sp is even more special: the address we
+   return for it IS the sp for the next frame.  */
 
 struct frame_saved_regs;
 struct frame_info;
@@ -371,24 +428,24 @@ void arm_frame_find_saved_regs (struct frame_info * fi,
 				struct frame_saved_regs * fsr);
 
 #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
- arm_frame_find_saved_regs (frame_info, &(frame_saved_regs));
-
+	arm_frame_find_saved_regs (frame_info, &(frame_saved_regs));
 
 /* Things needed for making the inferior call functions.  */
 
 #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
-  (arm_push_arguments ((nargs), (args), (sp), (struct_return), (struct_addr)))
-extern CORE_ADDR arm_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
+     sp = arm_push_arguments ((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR arm_push_arguments (int, struct value **, CORE_ADDR, int,
+				     CORE_ADDR);
 
 /* Push an empty stack frame, to record the current PC, etc.  */
 
-void arm_push_dummy_frame PARAMS ((void));
+void arm_push_dummy_frame (void);
 
 #define PUSH_DUMMY_FRAME arm_push_dummy_frame ()
 
 /* Discard from the stack the innermost frame, restoring all registers.  */
 
-void arm_pop_frame PARAMS ((void));
+void arm_pop_frame (void);
 
 #define POP_FRAME arm_pop_frame ()
 
@@ -400,69 +457,59 @@ void arm_pop_frame PARAMS ((void));
 
    Note this is 12 bytes.  */
 
-#define CALL_DUMMY {0xe1a0e00f, 0xe1a0f004, 0xE7FFDEFE}
-
-#define CALL_DUMMY_START_OFFSET 0	/* Start execution at beginning of dummy */
+#define CALL_DUMMY {0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe}
+#define CALL_DUMMY_START_OFFSET	 0	/* Start execution at beginning of dummy */
 
 #define CALL_DUMMY_BREAKPOINT_OFFSET arm_call_dummy_breakpoint_offset()
-extern int arm_call_dummy_breakpoint_offset PARAMS ((void));
+extern int arm_call_dummy_breakpoint_offset (void);
 
-/* Insert the specified number of args and function address
-   into a call sequence of the above form stored at DUMMYNAME.  */
+/* Insert the specified number of args and function address into a
+   call sequence of the above form stored at DUMMYNAME.  */
 
 #define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
-   arm_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
-
-void arm_fix_call_dummy PARAMS ((char *dummy, CORE_ADDR pc, CORE_ADDR fun,
-				 int nargs, struct value ** args,
-				 struct type * type, int gcc_p));
+   arm_fix_call_dummy ((dummyname), (pc), (fun), (nargs), (args), (type), (gcc_p))
 
-CORE_ADDR arm_get_next_pc PARAMS ((CORE_ADDR));
+void arm_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
+			 int nargs, struct value ** args,
+			 struct type * type, int gcc_p);
 
-/* Functions for dealing with Thumb call thunks.  */
-#define IN_SOLIB_CALL_TRAMPOLINE(pc, name)	arm_in_call_stub (pc, name)
-#define SKIP_TRAMPOLINE_CODE(pc)		arm_skip_stub (pc)
-extern int arm_in_call_stub PARAMS ((CORE_ADDR pc, char *name));
-extern CORE_ADDR arm_skip_stub PARAMS ((CORE_ADDR pc));
+CORE_ADDR arm_get_next_pc (CORE_ADDR pc);
 
-/* Function to determine whether MEMADDR is in a Thumb function.  */
-extern int arm_pc_is_thumb PARAMS ((bfd_vma memaddr));
-
-/* Function to determine whether MEMADDR is in a call dummy called from
-   a Thumb function.  */
-extern int arm_pc_is_thumb_dummy PARAMS ((bfd_vma memaddr));
-
-/* Macros for setting and testing a bit in a minimal symbol that
-   marks it as Thumb function.  The MSB of the minimal symbol's
-   "info" field is used for this purpose. This field is already
-   being used to store the symbol size, so the assumption is
-   that the symbol size cannot exceed 2^31.
+/* Macros for setting and testing a bit in a minimal symbol that marks
+   it as Thumb function.  The MSB of the minimal symbol's "info" field
+   is used for this purpose. This field is already being used to store
+   the symbol size, so the assumption is that the symbol size cannot
+   exceed 2^31.
 
    COFF_MAKE_MSYMBOL_SPECIAL
-   ELF_MAKE_MSYMBOL_SPECIAL     tests whether the COFF or ELF symbol corresponds 
-   to a thumb function, and sets a "special" bit in a
-   minimal symbol to indicate that it does
-   MSYMBOL_SET_SPECIAL  actually sets the "special" bit
-   MSYMBOL_IS_SPECIAL   tests the "special" bit in a minimal symbol
-   MSYMBOL_SIZE         returns the size of the minimal symbol, i.e.
-   the "info" field with the "special" bit masked out
- */
+   ELF_MAKE_MSYMBOL_SPECIAL
+   
+   These macros test whether the COFF or ELF symbol corresponds to a
+   thumb function, and set a "special" bit in a minimal symbol to
+   indicate that it does.
+   
+   MSYMBOL_SET_SPECIAL	Actually sets the "special" bit.
+   MSYMBOL_IS_SPECIAL   Tests the "special" bit in a minimal symbol.
+   MSYMBOL_SIZE         Returns the size of the minimal symbol,
+   			i.e. the "info" field with the "special" bit
+   			masked out 
+   */
 
 extern int coff_sym_is_thumb (int val);
+
 #define MSYMBOL_SET_SPECIAL(msym) \
-    MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000)
+	MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000)
 #define MSYMBOL_IS_SPECIAL(msym) \
   (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
 #define MSYMBOL_SIZE(msym) \
   ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
 
-/* Thumb symbol are of type STT_LOPROC, (synonymous with STT_ARM_TFUNC) */
+/* Thumb symbols are of type STT_LOPROC, (synonymous with STT_ARM_TFUNC) */
 #define ELF_MAKE_MSYMBOL_SPECIAL(sym,msym) \
- { if(ELF_ST_TYPE(((elf_symbol_type *)(sym))->internal_elf_sym.st_info) == STT_LOPROC) \
-	MSYMBOL_SET_SPECIAL(msym); }
+	{ if(ELF_ST_TYPE(((elf_symbol_type *)(sym))->internal_elf_sym.st_info) == STT_LOPROC) \
+		MSYMBOL_SET_SPECIAL(msym); }
 
 #define COFF_MAKE_MSYMBOL_SPECIAL(val,msym) \
  { if(coff_sym_is_thumb(val)) MSYMBOL_SET_SPECIAL(msym); }
 
-#undef  IN_SIGTRAMP
-#define IN_SIGTRAMP(pc, name) 0
+#endif /* TM_ARM_H */
diff --git a/gdb/config/arm/tm-embed.h b/gdb/config/arm/tm-embed.h
new file mode 100644
index 0000000..f42b4f2
--- /dev/null
+++ b/gdb/config/arm/tm-embed.h
@@ -0,0 +1,66 @@
+/* Definitions to target GDB to ARM embedded systems.
+   Copyright 1986-1989, 1991, 1993-1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_ARMEMBED_H
+#define TM_ARMEMBED_H
+
+/* Include the common ARM definitions. */
+#include "arm/tm-arm.h"
+
+/* I don't know the real values for these.  */
+#define TARGET_UPAGES UPAGES
+#define TARGET_NBPG NBPG
+
+/* Address of end of stack space.  */
+#define STACK_END_ADDR (0x01000000 - (TARGET_UPAGES * TARGET_NBPG))
+
+/* The first 0x20 bytes are the trap vectors.  */
+#define LOWEST_PC	0x20
+
+/* Override defaults.  */
+
+#undef THUMB_LE_BREAKPOINT
+#define THUMB_LE_BREAKPOINT {0xbe,0xbe}       
+#undef THUMB_BE_BREAKPOINT
+#define THUMB_BE_BREAKPOINT {0xbe,0xbe}       
+
+/* Specify that for the native compiler variables for a particular
+   lexical context are listed after the beginning LBRAC instead of
+   before in the executables list of symbols.  */
+#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) (!(gcc_p))
+
+/* Functions for dealing with Thumb call thunks.  */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name)	arm_in_call_stub (pc, name)
+#define SKIP_TRAMPOLINE_CODE(pc)		arm_skip_stub (pc)
+extern int arm_in_call_stub PARAMS ((CORE_ADDR pc, char *name));
+extern CORE_ADDR arm_skip_stub PARAMS ((CORE_ADDR pc));
+
+/* Function to determine whether MEMADDR is in a Thumb function.  */
+extern int arm_pc_is_thumb PARAMS ((bfd_vma memaddr));
+
+/* Function to determine whether MEMADDR is in a call dummy called from
+   a Thumb function.  */
+extern int arm_pc_is_thumb_dummy PARAMS ((bfd_vma memaddr));
+
+
+#undef  IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) 0
+
+#endif /* TM_ARMEMBED_H */
diff --git a/gdb/config/arm/tm-linux.h b/gdb/config/arm/tm-linux.h
new file mode 100644
index 0000000..27cc0d1
--- /dev/null
+++ b/gdb/config/arm/tm-linux.h
@@ -0,0 +1,122 @@
+/* Target definitions for GNU/Linux on ARM, for GDB.
+   Copyright 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_ARMLINUX_H
+#define TM_ARMLINUX_H
+
+/* Include the common ARM target definitions.  */
+#include "arm/tm-arm.h"
+
+#include "tm-linux.h"
+
+/* Target byte order on ARM Linux is not selectable.  */
+#undef TARGET_BYTE_ORDER_SELECTABLE_P
+#define TARGET_BYTE_ORDER_SELECTABLE_P		0
+
+/* Under ARM Linux the traditional way of performing a breakpoint is to
+   execute a particular software interrupt, rather than use a particular
+   undefined instruction to provoke a trap.  Upon exection of the software
+   interrupt the kernel stops the inferior with a SIGTRAP, and wakes the
+   debugger.  Since ARM Linux is little endian, and doesn't support Thumb
+   at the moment we redefined ARM_LE_BREAKPOINT to use the correct software
+   interrupt.  */
+#undef ARM_LE_BREAKPOINT
+#define ARM_LE_BREAKPOINT	{0x01,0x00,0x9f,0xef}
+
+/* This sequence of words used in the CALL_DUMMY are the following 
+   instructions:
+
+   mov  lr, pc
+   mov  pc, r4
+   swi	bkpt_swi
+
+   Note this is 12 bytes.  */
+
+#undef CALL_DUMMY
+#define CALL_DUMMY {0xe1a0e00f, 0xe1a0f004, 0xef9f001}
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+extern void arm_linux_extract_return_value (struct type *, char[], char *);
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+	arm_linux_extract_return_value ((TYPE), (REGBUF), (VALBUF))
+
+/* The first page is not writeable in ARM Linux.  */
+#define LOWEST_PC	0x8000
+
+/* Define NO_SINGLE_STEP if ptrace(PT_STEP,...) fails to function correctly
+   on ARM Linux.  This is the case on 2.0.x kernels, 2.1.x kernels and some 
+   2.2.x kernels.  This will include the implementation of single_step()
+   in armlinux-tdep.c.  See armlinux-ss.c for more details. */
+/* #define NO_SINGLE_STEP	1 */
+
+/* Offset to saved PC in sigcontext structure, from <asm/sigcontext.h> */
+#define SIGCONTEXT_PC_OFFSET	(sizeof(unsigned long) * 18)
+
+/* Figure out where the longjmp will land.  The code expects that longjmp
+   has just been entered and the code had not altered the registers, so
+   the arguments are are still in r0-r1.  r0 points at the jmp_buf structure
+   from which the target pc (JB_PC) is extracted.  This pc value is copied
+   into ADDR.  This routine returns true on success */
+extern int arm_get_longjmp_target (CORE_ADDR *);
+#define GET_LONGJMP_TARGET(addr)	arm_get_longjmp_target (addr)
+
+/* On ARM Linux, each call to a library routine goes through a small piece
+   of trampoline code in the ".plt" section.  The  wait_for_inferior() 
+   routine uses this macro to detect when we have stepped into one of 
+   these fragments.  We do not use lookup_solib_trampoline_symbol_by_pc,
+   because we cannot always find the shared library trampoline symbols.  */
+extern int in_plt_section (CORE_ADDR, char *);
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) in_plt_section((pc), (name))
+
+/* On ARM Linux, a call to a library routine does not have to go through
+   any trampoline code.  */
+#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name)	0
+
+/* If PC is in a shared library trampoline code, return the PC
+   where the function itself actually starts.  If not, return 0.  */
+extern CORE_ADDR find_solib_trampoline_target (CORE_ADDR pc);   
+#define SKIP_TRAMPOLINE_CODE(pc)  find_solib_trampoline_target (pc)
+
+/* When we call a function in a shared library, and the PLT sends us
+   into the dynamic linker to find the function's real address, we
+   need to skip over the dynamic linker call.  This function decides
+   when to skip, and where to skip to.  See the comments for
+   SKIP_SOLIB_RESOLVER at the top of infrun.c.  */
+extern CORE_ADDR arm_skip_solib_resolver (CORE_ADDR pc);
+#define SKIP_SOLIB_RESOLVER arm_skip_solib_resolver
+
+/* When we call a function in a shared library, and the PLT sends us
+   into the dynamic linker to find the function's real address, we
+   need to skip over the dynamic linker call.  This function decides
+   when to skip, and where to skip to.  See the comments for
+   SKIP_SOLIB_RESOLVER at the top of infrun.c.  */
+#if 0   
+#undef IN_SOLIB_DYNSYM_RESOLVE_CODE
+extern CORE_ADDR arm_in_solib_dynsym_resolve_code (CORE_ADDR pc, char *name);
+#define IN_SOLIB_DYNSYM_RESOLVE_CODE  arm_in_solib_dynsym_resolve_code
+/* ScottB: Current definition is 
+extern CORE_ADDR in_svr4_dynsym_resolve_code (CORE_ADDR pc, char *name);
+#define IN_SOLIB_DYNSYM_RESOLVE_CODE  in_svr4_dynsym_resolve_code */
+#endif
+
+#endif /* TM_ARMLINUX_H */
diff --git a/gdb/config/arm/xm-arm.h b/gdb/config/arm/xm-arm.h
index d73095a..c3b6185 100644
--- a/gdb/config/arm/xm-arm.h
+++ b/gdb/config/arm/xm-arm.h
@@ -1,77 +1,77 @@
-/* Definitions to make GDB run on an ARM under RISCiX (4.3bsd).
-   Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place - Suite 330,
-   Boston, MA 02111-1307, USA.  */
-
-#define HOST_BYTE_ORDER LITTLE_ENDIAN
-
-
-#if 0
-/* Interface definitions for kernel debugger KDB.  */
-
-/* Map machine fault codes into signal numbers.
-   First subtract 0, divide by 4, then index in a table.
-   Faults for which the entry in this table is 0
-   are not handled by KDB; the program's own trap handler
-   gets to handle then.  */
-
-#define FAULT_CODE_ORIGIN 0
-#define FAULT_CODE_UNITS 4
-#define FAULT_TABLE    \
-{ 0, SIGKILL, SIGSEGV, 0, 0, 0, 0, 0, \
-  0, 0, SIGTRAP, SIGTRAP, 0, 0, 0, 0, \
-  0, 0, 0, 0, 0, 0, 0, 0}
-
-/* Start running with a stack stretching from BEG to END.
-   BEG and END should be symbols meaningful to the assembler.
-   This is used only for kdb.  */
-
-#define INIT_STACK(beg, end)  \
-{ asm (".globl end");         \
-  asm ("movl $ end, sp");      \
-  asm ("clrl fp"); }
-
-/* Push the frame pointer register on the stack.  */
-#define PUSH_FRAME_PTR        \
-  asm ("pushl fp");
-
-/* Copy the top-of-stack to the frame pointer register.  */
-#define POP_FRAME_PTR  \
-  asm ("movl (sp), fp");
-
-/* After KDB is entered by a fault, push all registers
-   that GDB thinks about (all NUM_REGS of them),
-   so that they appear in order of ascending GDB register number.
-   The fault code will be on the stack beyond the last register.  */
-
-#define PUSH_REGISTERS        \
-{ asm ("pushl 8(sp)");        \
-  asm ("pushl 8(sp)");        \
-  asm ("pushal 0x14(sp)");    \
-  asm ("pushr $037777"); }
-
-/* Assuming the registers (including processor status) have been
-   pushed on the stack in order of ascending GDB register number,
-   restore them and return to the address in the saved PC register.  */
-
-#define POP_REGISTERS      \
-{ asm ("popr $037777");    \
-  asm ("subl2 $8,(sp)");   \
-  asm ("movl (sp),sp");    \
-  asm ("rei"); }
-#endif /* 0 */
+/* OBSOLETE /* Definitions to make GDB run on an ARM under RISCiX (4.3bsd). */
+/* OBSOLETE    Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc. */
+/* OBSOLETE  */
+/* OBSOLETE    This file is part of GDB. */
+/* OBSOLETE  */
+/* OBSOLETE    This program is free software; you can redistribute it and/or modify */
+/* OBSOLETE    it under the terms of the GNU General Public License as published by */
+/* OBSOLETE    the Free Software Foundation; either version 2 of the License, or */
+/* OBSOLETE    (at your option) any later version. */
+/* OBSOLETE  */
+/* OBSOLETE    This program is distributed in the hope that it will be useful, */
+/* OBSOLETE    but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* OBSOLETE    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the */
+/* OBSOLETE    GNU General Public License for more details. */
+/* OBSOLETE  */
+/* OBSOLETE    You should have received a copy of the GNU General Public License */
+/* OBSOLETE    along with this program; if not, write to the Free Software */
+/* OBSOLETE    Foundation, Inc., 59 Temple Place - Suite 330, */
+/* OBSOLETE    Boston, MA 02111-1307, USA.  *x/ */
+/* OBSOLETE  */
+/* OBSOLETE #define HOST_BYTE_ORDER LITTLE_ENDIAN */
+/* OBSOLETE  */
+/* OBSOLETE  */
+/* OBSOLETE #if 0 */
+/* OBSOLETE /* Interface definitions for kernel debugger KDB.  *x/ */
+/* OBSOLETE  */
+/* OBSOLETE /* Map machine fault codes into signal numbers. */
+/* OBSOLETE    First subtract 0, divide by 4, then index in a table. */
+/* OBSOLETE    Faults for which the entry in this table is 0 */
+/* OBSOLETE    are not handled by KDB; the program's own trap handler */
+/* OBSOLETE    gets to handle then.  *x/ */
+/* OBSOLETE  */
+/* OBSOLETE #define FAULT_CODE_ORIGIN 0 */
+/* OBSOLETE #define FAULT_CODE_UNITS 4 */
+/* OBSOLETE #define FAULT_TABLE    \ */
+/* OBSOLETE { 0, SIGKILL, SIGSEGV, 0, 0, 0, 0, 0, \ */
+/* OBSOLETE   0, 0, SIGTRAP, SIGTRAP, 0, 0, 0, 0, \ */
+/* OBSOLETE   0, 0, 0, 0, 0, 0, 0, 0} */
+/* OBSOLETE  */
+/* OBSOLETE /* Start running with a stack stretching from BEG to END. */
+/* OBSOLETE    BEG and END should be symbols meaningful to the assembler. */
+/* OBSOLETE    This is used only for kdb.  *x/ */
+/* OBSOLETE  */
+/* OBSOLETE #define INIT_STACK(beg, end)  \ */
+/* OBSOLETE { asm (".globl end");         \ */
+/* OBSOLETE   asm ("movl $ end, sp");      \ */
+/* OBSOLETE   asm ("clrl fp"); } */
+/* OBSOLETE  */
+/* OBSOLETE /* Push the frame pointer register on the stack.  *x/ */
+/* OBSOLETE #define PUSH_FRAME_PTR        \ */
+/* OBSOLETE   asm ("pushl fp"); */
+/* OBSOLETE  */
+/* OBSOLETE /* Copy the top-of-stack to the frame pointer register.  *x/ */
+/* OBSOLETE #define POP_FRAME_PTR  \ */
+/* OBSOLETE   asm ("movl (sp), fp"); */
+/* OBSOLETE  */
+/* OBSOLETE /* After KDB is entered by a fault, push all registers */
+/* OBSOLETE    that GDB thinks about (all NUM_REGS of them), */
+/* OBSOLETE    so that they appear in order of ascending GDB register number. */
+/* OBSOLETE    The fault code will be on the stack beyond the last register.  *x/ */
+/* OBSOLETE  */
+/* OBSOLETE #define PUSH_REGISTERS        \ */
+/* OBSOLETE { asm ("pushl 8(sp)");        \ */
+/* OBSOLETE   asm ("pushl 8(sp)");        \ */
+/* OBSOLETE   asm ("pushal 0x14(sp)");    \ */
+/* OBSOLETE   asm ("pushr $037777"); } */
+/* OBSOLETE  */
+/* OBSOLETE /* Assuming the registers (including processor status) have been */
+/* OBSOLETE    pushed on the stack in order of ascending GDB register number, */
+/* OBSOLETE    restore them and return to the address in the saved PC register.  *x/ */
+/* OBSOLETE  */
+/* OBSOLETE #define POP_REGISTERS      \ */
+/* OBSOLETE { asm ("popr $037777");    \ */
+/* OBSOLETE   asm ("subl2 $8,(sp)");   \ */
+/* OBSOLETE   asm ("movl (sp),sp");    \ */
+/* OBSOLETE   asm ("rei"); } */
+/* OBSOLETE #endif /* 0 *x/ */
diff --git a/gdb/config/arm/xm-linux.h b/gdb/config/arm/xm-linux.h
new file mode 100644
index 0000000..ef724b5
--- /dev/null
+++ b/gdb/config/arm/xm-linux.h
@@ -0,0 +1,37 @@
+/* Host definitions for ARM GNU/Linux, for GDB, the GNU debugger.
+   Copyright 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_ARMLINUX_H
+#define XM_ARMLINUX_H
+
+#define HOST_BYTE_ORDER		LITTLE_ENDIAN
+
+#define HAVE_TERMIOS
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+#define NEED_POSIX_SETPGID
+
+/* Need R_OK etc, but USG isn't defined.  */
+#include <unistd.h>
+
+#endif /* XM_ARMLINUX_H */
diff --git a/gdb/config/i386/linux.mh b/gdb/config/i386/linux.mh
index 8464934..febed9a 100644
--- a/gdb/config/i386/linux.mh
+++ b/gdb/config/i386/linux.mh
@@ -5,4 +5,6 @@ XDEPFILES= ser-tcp.o
 
 NAT_FILE= nm-linux.h
 NATDEPFILES= infptrace.o solib.o inftarg.o fork-child.o corelow.o \
-	core-aout.o i386v-nat.o i386-linux-nat.o linux-thread.o
+	core-aout.o i386v-nat.o i386-linux-nat.o linux-thread.o lin-thread.o
+
+LOADLIBES = -ldl -rdynamic
diff --git a/gdb/config/i386/tm-cygwin.h b/gdb/config/i386/tm-cygwin.h
index 2faa4bf..aade168 100644
--- a/gdb/config/i386/tm-cygwin.h
+++ b/gdb/config/i386/tm-cygwin.h
@@ -29,4 +29,20 @@
 extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR pc, char *name));
 
 extern char *cygwin_pid_to_str PARAMS ((int pid));
-#define target_pid_to_str(PID) cygwin_pid_to_str (PID)
+
+struct frame_info;
+void child_init_frame(int x, struct frame_info *);
+CORE_ADDR child_frame_saved_pc(struct frame_info *);
+CORE_ADDR child_frame_chain(struct frame_info *);
+
+#undef FRAME_CHAIN_VALID_ALTERNATE
+#define FRAME_CHAIN_VALID_ALTERNATE 1
+
+#undef INIT_EXTRA_FRAME_INFO
+#define INIT_EXTRA_FRAME_INFO(x, f) child_init_frame(x, f) 
+
+#undef FRAME_CHAIN
+#define FRAME_CHAIN child_frame_chain
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC child_frame_saved_pc
diff --git a/gdb/config/i386/tm-i386sol2.h b/gdb/config/i386/tm-i386sol2.h
index 6fcfcef..f35912f 100644
--- a/gdb/config/i386/tm-i386sol2.h
+++ b/gdb/config/i386/tm-i386sol2.h
@@ -53,12 +53,10 @@ extern char *sunpro_static_transform_name PARAMS ((char *));
 #ifdef HAVE_THREAD_DB_LIB
 
 extern char *solaris_pid_to_str PARAMS ((int pid));
-#define target_pid_to_str(PID) solaris_pid_to_str (PID)
 
 #else
 
 extern char *procfs_pid_to_str PARAMS ((int pid));
-#define target_pid_to_str(PID) procfs_pid_to_str (PID)
 
 #endif
 
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
index 6e7e72c..ea9d04c 100644
--- a/gdb/config/mips/tm-mips.h
+++ b/gdb/config/mips/tm-mips.h
@@ -422,7 +422,9 @@ extern void mips_push_dummy_frame PARAMS ((void));
 #define POP_FRAME		mips_pop_frame()
 extern void mips_pop_frame PARAMS ((void));
 
+#if !GDB_MULTI_ARCH
 #define CALL_DUMMY { 0 }
+#endif
 
 #define CALL_DUMMY_START_OFFSET (0)
 
diff --git a/gdb/config/nm-gnu.h b/gdb/config/nm-gnu.h
index acd7521..b6e016f 100644
--- a/gdb/config/nm-gnu.h
+++ b/gdb/config/nm-gnu.h
@@ -26,8 +26,6 @@
 #include <mach.h>
 #include <mach/exception.h>
 
-#undef target_pid_to_str
-#define target_pid_to_str(pid) gnu_target_pid_to_str(pid)
 extern char *gnu_target_pid_to_str (int pid);
 
 /* Before storing, we need to read all the registers.  */
diff --git a/gdb/config/nm-linux.h b/gdb/config/nm-linux.h
index 9805306..9b22582 100644
--- a/gdb/config/nm-linux.h
+++ b/gdb/config/nm-linux.h
@@ -37,14 +37,25 @@
 
 struct objfile;
 
+/* Hook to look at new objfiles (shared libraries) */
 extern void
 linuxthreads_new_objfile PARAMS ((struct objfile *objfile));
-#define target_new_objfile(OBJFILE) linuxthreads_new_objfile (OBJFILE)
 
+/* Method to print a human-readable thread description */
 extern char *
 linuxthreads_pid_to_str PARAMS ((int pid));
-#define target_pid_to_str(PID) linuxthreads_pid_to_str (PID)
 
 extern int
 linuxthreads_prepare_to_proceed PARAMS ((int step));
 #define PREPARE_TO_PROCEED(select_it) linuxthreads_prepare_to_proceed (1)
+
+/* Defined to make stepping-over-breakpoints be thread-atomic.  */
+#define USE_THREAD_STEP_NEEDED 1
+
+/* Macros to extract process id and thread id from a composite pid/tid.
+   Allocate lower 19 bits for process id, next 12 bits for thread id, and
+   one bit for a flag to indicate a user thread vs. a kernel thread.  */
+#define PIDGET(PID)           (((PID) & 0xffff))
+#define TIDGET(PID)           (((PID) & 0x7fffffff) >> 16)
+#define MERGEPID(PID, TID)    (((PID) & 0xffff) | ((TID) << 16))
+
diff --git a/gdb/config/nm-lynx.h b/gdb/config/nm-lynx.h
index e97b886..88974b1 100644
--- a/gdb/config/nm-lynx.h
+++ b/gdb/config/nm-lynx.h
@@ -75,10 +75,9 @@ extern int child_wait PARAMS ((int pid, struct target_waitstatus * status));
 /* Lynx needs a special definition of this so that we can
    print out the pid and thread number seperatly.  */
 
-#undef target_pid_to_str
-
-#define target_pid_to_str(PID) lynx_pid_to_str (PID)
 
+/* override child_pid_to_str in inftarg.c */
+#define CHILD_PID_TO_STR
 extern char *lynx_pid_to_str PARAMS ((int pid));
 
 #endif /* NM_LYNX_H */
diff --git a/gdb/config/pa/nm-hppah.h b/gdb/config/pa/nm-hppah.h
index 7b277d1..c7466ca 100644
--- a/gdb/config/pa/nm-hppah.h
+++ b/gdb/config/pa/nm-hppah.h
@@ -90,6 +90,7 @@ extern int hppa_prepare_to_proceed PARAMS ((void));
 #define CHILD_HAS_SYSCALL_EVENT
 #define CHILD_POST_ATTACH
 #define CHILD_THREAD_ALIVE
+#define CHILD_PID_TO_STR
 
 #define REQUIRE_ATTACH(pid) hppa_require_attach(pid)
 extern int hppa_require_attach PARAMS ((int));
@@ -226,9 +227,8 @@ extern void hppa_disable_page_protection_events PARAMS ((int));
  * than processes.  So we need a new way to print
  * the string.  Code is in hppah-nat.c.
  */
-#define target_pid_to_str( pid ) \
-        hppa_pid_to_str( pid )
-extern char *hppa_pid_to_str PARAMS ((pid_t));
+
+extern char *child_pid_to_str PARAMS ((pid_t));
 
 #define target_tid_to_str( pid ) \
         hppa_tid_to_str( pid )
@@ -277,13 +277,6 @@ extern void hppa_ensure_vforking_parent_remains_stopped PARAMS ((int));
         hppa_resume_execd_vforking_child_to_get_parent_vfork ()
 extern int hppa_resume_execd_vforking_child_to_get_parent_vfork PARAMS ((void));
 
-#ifdef HAVE_HPUX_THREAD_SUPPORT
-
-extern char *hpux_pid_to_str PARAMS ((int pid));
-#define target_pid_to_str(PID) hpux_pid_to_str (PID)
-
-#endif /* HAVE_HPUX_THREAD_SUPPORT */
-
 #define HPUXHPPA
 
 #define MAY_SWITCH_FROM_INFERIOR_PID (1)
diff --git a/gdb/config/sparc/tm-sun4sol2.h b/gdb/config/sparc/tm-sun4sol2.h
index 74c2d4e..07b5896 100644
--- a/gdb/config/sparc/tm-sun4sol2.h
+++ b/gdb/config/sparc/tm-sun4sol2.h
@@ -85,11 +85,9 @@ extern char *sunpro_static_transform_name PARAMS ((char *));
 #ifdef HAVE_THREAD_DB_LIB
 
 extern char *solaris_pid_to_str PARAMS ((int pid));
-#define target_pid_to_str(PID) solaris_pid_to_str (PID)
 
 #else
 
 extern char *procfs_pid_to_str PARAMS ((int pid));
-#define target_pid_to_str(PID) procfs_pid_to_str (PID)
 
 #endif