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author | Andrew Cagney <cagney@redhat.com> | 1998-11-27 23:35:08 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1998-11-27 23:35:08 +0000 |
commit | 02331869322178ead208b8328caab67c5a77b6b3 (patch) | |
tree | 0e95f5333158653177ab82d4793d08af10c0d2ea /gdb/config | |
parent | 5825dfc52513bdb91e298f7cf7642235644ee65a (diff) | |
download | gdb-02331869322178ead208b8328caab67c5a77b6b3.zip gdb-02331869322178ead208b8328caab67c5a77b6b3.tar.gz gdb-02331869322178ead208b8328caab67c5a77b6b3.tar.bz2 |
CARP:
STEP_SKIPS_DELAY - add STEP_SKIPS_DELAY_P and rewrite use removing
#ifdef's.
NO_SINGLE_STEP - replace with SOFTWARE_SINGLE_STEP_P +
SOFTWARE_SINGLE_STEP. Replace global variable one_stepped with static
singlestep_breakpoints_inserted_p. Cleanup infrun.c (scary!).
Diffstat (limited to 'gdb/config')
-rw-r--r-- | gdb/config/arc/tm-arc.h | 4 | ||||
-rw-r--r-- | gdb/config/mips/tm-mips.h | 3 | ||||
-rw-r--r-- | gdb/config/rs6000/tm-rs6000.h | 4 | ||||
-rw-r--r-- | gdb/config/sparc/tm-sparc.h | 4 |
4 files changed, 11 insertions, 4 deletions
diff --git a/gdb/config/arc/tm-arc.h b/gdb/config/arc/tm-arc.h index aebdc58..69a3a6f 100644 --- a/gdb/config/arc/tm-arc.h +++ b/gdb/config/arc/tm-arc.h @@ -62,7 +62,9 @@ extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR, int)); /* We don't have a reliable single step facility. ??? We do have a cycle single step facility, but that won't work. */ -#define NO_SINGLE_STEP +#define SOFTWARE_SINGLE_STEP_P 1 +extern void arc_software_single_step PARAMS ((unsigned int, int)); +#define SOFTWARE_SINGLE_STEP(sig,bp_p) arc_software_single_step (sig, bp_p) /* FIXME: Need to set STEP_SKIPS_DELAY. */ diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h index 5ca8fa4..e16a498 100644 --- a/gdb/config/mips/tm-mips.h +++ b/gdb/config/mips/tm-mips.h @@ -102,8 +102,9 @@ extern CORE_ADDR mips_skip_prologue PARAMS ((CORE_ADDR addr, int lenient)); /* Return non-zero if PC points to an instruction which will cause a step to execute both the instruction at PC and an instruction at PC+4. */ -#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc)) extern int mips_step_skips_delay PARAMS ((CORE_ADDR)); +#define STEP_SKIPS_DELAY_P (1) +#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc)) /* Immediately after a function call, return the saved pc. Can't always go through the frames for this because on some machines diff --git a/gdb/config/rs6000/tm-rs6000.h b/gdb/config/rs6000/tm-rs6000.h index 7ae9329..339d8a8 100644 --- a/gdb/config/rs6000/tm-rs6000.h +++ b/gdb/config/rs6000/tm-rs6000.h @@ -626,7 +626,9 @@ extern int is_magic_function_pointer PARAMS ((CORE_ADDR)); /* RS6000/AIX does not support PT_STEP. Has to be simulated. */ -#define NO_SINGLE_STEP +#define SOFTWARE_SINGLE_STEP_P 1 +extern void rs6000_software_single_step PARAMS ((unsigned int, int)); +#define SOFTWARE_SINGLE_STEP(sig,bp_p) rs6000_software_single_step (sig, bp_p) /* If the current gcc for for this target does not produce correct debugging information for float parameters, both prototyped and unprototyped, then diff --git a/gdb/config/sparc/tm-sparc.h b/gdb/config/sparc/tm-sparc.h index fc978f7..d5eb576 100644 --- a/gdb/config/sparc/tm-sparc.h +++ b/gdb/config/sparc/tm-sparc.h @@ -527,7 +527,9 @@ void sparc_fix_call_dummy PARAMS ((char *dummy, CORE_ADDR pc, CORE_ADDR fun, /* Sparc has no reliable single step ptrace call */ -#define NO_SINGLE_STEP 1 +#define SOFTWARE_SINGLE_STEP_P 1 +extern void sparc_software_single_step PARAMS ((unsigned int, int)); +#define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p) /* We need more arguments in a frame specification for the "frame" or "info frame" command. */ |