diff options
| author | Andrew Cagney <cagney@redhat.com> | 2002-01-29 03:51:19 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 2002-01-29 03:51:19 +0000 |
| commit | afe64c1a68ec5ba0921fd218d25257ae969b1cd2 (patch) | |
| tree | 037db6f4d1cdfab0b982dbe798f56ce11c7a02eb /gdb/config | |
| parent | 75bc7ddf1b1e98d946b1b3c260c56d2d8ebd251e (diff) | |
| download | gdb-afe64c1a68ec5ba0921fd218d25257ae969b1cd2.zip gdb-afe64c1a68ec5ba0921fd218d25257ae969b1cd2.tar.gz gdb-afe64c1a68ec5ba0921fd218d25257ae969b1cd2.tar.bz2 | |
* arch-utils.c (TARGET_BYTE_ORDER_DEFAULT): Delete macro.
(target_byte_order): Initialize to BFD_ENDIAN_BIG.
(initialize_current_architecture): Update target_byte_order using
information from BFD.
* config/powerpc/tm-ppcle-eabi.h (TARGET_BYTE_ORDER_DEFAULT):
* config/mcore/tm-mcore.h (TARGET_BYTE_ORDER_DEFAULT):
* config/arm/tm-arm.h (TARGET_BYTE_ORDER_DEFAULT): Delete.
Update doco.
Diffstat (limited to 'gdb/config')
| -rw-r--r-- | gdb/config/arm/tm-arm.h | 7 | ||||
| -rw-r--r-- | gdb/config/mcore/tm-mcore.h | 3 |
2 files changed, 3 insertions, 7 deletions
diff --git a/gdb/config/arm/tm-arm.h b/gdb/config/arm/tm-arm.h index 6bd95ad..7316f92 100644 --- a/gdb/config/arm/tm-arm.h +++ b/gdb/config/arm/tm-arm.h @@ -29,10 +29,6 @@ struct type; struct value; -/* Target byte order on ARM defaults to selectable, and defaults to - little endian. */ -#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE - /* IEEE format floating point. */ #define TARGET_DOUBLE_FORMAT (target_byte_order == BFD_ENDIAN_BIG \ ? &floatformat_ieee_double_big \ @@ -169,6 +165,9 @@ extern void arm_float_info (void); #define NUM_GREGS 16 /* Number of general purpose registers. */ #define NUM_REGS (NUM_GREGS + NUM_FREGS + NUM_SREGS) +/* An array of names of registers. */ +extern char **arm_register_names; + #define REGISTER_NAME(i) arm_register_name(i) char *arm_register_name (int); diff --git a/gdb/config/mcore/tm-mcore.h b/gdb/config/mcore/tm-mcore.h index 80e438e..7ce6373 100644 --- a/gdb/config/mcore/tm-mcore.h +++ b/gdb/config/mcore/tm-mcore.h @@ -20,9 +20,6 @@ #include "regcache.h" -/* The mcore is little endian (by default) */ -#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE - /* All registers are 32 bits */ #define REGISTER_SIZE 4 #define MAX_REGISTER_RAW_SIZE 4 |