diff options
author | Mark Alexander <marka@cygnus> | 1997-01-28 00:50:13 +0000 |
---|---|---|
committer | Mark Alexander <marka@cygnus> | 1997-01-28 00:50:13 +0000 |
commit | f9f8c14b1a642a7f463f0f0ce8175f232702b595 (patch) | |
tree | 69c6e423028b665c62d496e8508f9b28c5849381 /gdb/config | |
parent | 0192b099bde982f3d5ef9a74cb8a5b0dae816f2a (diff) | |
download | gdb-f9f8c14b1a642a7f463f0f0ce8175f232702b595.zip gdb-f9f8c14b1a642a7f463f0f0ce8175f232702b595.tar.gz gdb-f9f8c14b1a642a7f463f0f0ce8175f232702b595.tar.bz2 |
First set of changes for mips16:
* config/mips/tm-mips.h (MIPS16_BIG_BREAKPOINT,
MIPS16_LITTLE_BREAKPOINT, BREAKPOINT_FROM_PC): Define.
(ABOUT_TO_RETURN): Call new function mips_about_to_return.
(mips_breakpoint_from_pc, mips_about_to_return): Declare.
* mem-break.c (memory_breakpoint_from_pc): New function.
(memory_insert_breakpoint, memory_remove_breakpoint): Use
memory_breakpoint_from_pc to determine breakpoint contents and size.
* target.h (memory_breakpoint_from_pc): Declare.
* monitor.c (monitor_insert_breakpoint): Use memory_breakpoint_from_pc
to determine size of breakpoint instruction.
* mips-tdep.c (mips32_decode_reg_save, mips16_decode_reg_save):
New helper functions for mips_find_saved_regs.
(mips_find_saved_regs): Recognize mips16 prologues.
(mips_addr_bits_remove): Strip off upper 32 bits of address
when target CPU is 32 bits but CORE_ADDR is 64 bits.
(mips_step_skips_delay): No branch delay slot on mips16.
(gdb_print_insn_mips): Disassemble mips16 code.
(mips_breakpoint_from_pc, mips_about_to_return): New functions.
Diffstat (limited to 'gdb/config')
-rw-r--r-- | gdb/config/mips/tm-mips.h | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h index ace22ac..aa595f5 100644 --- a/gdb/config/mips/tm-mips.h +++ b/gdb/config/mips/tm-mips.h @@ -114,8 +114,23 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *)); #define INNER_THAN < #define BIG_ENDIAN 4321 + +/* Old-style breakpoint macros. */ + #define BIG_BREAKPOINT {0, 0x5, 0, 0xd} #define LITTLE_BREAKPOINT {0xd, 0, 0x5, 0} +#define MIPS16_BIG_BREAKPOINT {0xe8, 0xa5} +#define MIPS16_LITTLE_BREAKPOINT {0xa5, 0xe8} + +/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a + 16- or 32-bit breakpoint should be used. It returns a pointer + to a string of bytes that encode a breakpoint instruction, stores + the length of the string to *lenptr, and adjusts the pc (if necessary) to + point to the actual memory location where the breakpoint should be + inserted. */ + +unsigned char *mips_breakpoint_from_pc PARAMS ((CORE_ADDR *pcptr, int *lenptr)); +#define BREAKPOINT_FROM_PC(pcptr, lenptr) mips_breakpoint_from_pc(pcptr, lenptr) /* Amount PC must be decremented by after a breakpoint. This is often the number of bytes in BREAKPOINT @@ -125,7 +140,8 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *)); /* Nonzero if instruction at PC is a return instruction. "j ra" on mips. */ -#define ABOUT_TO_RETURN(pc) (read_memory_integer (pc, 4) == 0x3e00008) +int mips_about_to_return PARAMS ((CORE_ADDR pc)); +#define ABOUT_TO_RETURN(pc) mips_about_to_return (pc) /* Say how long (ordinary) registers are. This is a piece of bogosity used in push_word and a few other places; REGISTER_RAW_SIZE is the |