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author | Andrew Cagney <cagney@redhat.com> | 2004-10-30 22:36:34 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 2004-10-30 22:36:34 +0000 |
commit | 613e114ff9d8c0f2bbe5177ef94f702123bb8885 (patch) | |
tree | 0430c3bc647f9b87f9b1b8867b9f74b36dfd8db1 /gdb/config | |
parent | d37cca3d684da261b7982e9b854d532048a355e2 (diff) | |
download | gdb-613e114ff9d8c0f2bbe5177ef94f702123bb8885.zip gdb-613e114ff9d8c0f2bbe5177ef94f702123bb8885.tar.gz gdb-613e114ff9d8c0f2bbe5177ef94f702123bb8885.tar.bz2 |
2004-10-30 Andrew Cagney <cagney@gnu.org>
* mips-tdep.h: Add comments on registers.
(MIPS_UNUSED_REGNUM): Define.
* config/mips/tm-mips.h (ZERO_REGNUM, UNUSED_REGNUM)
(T9_REGNUM, V0_REGNUM, A0_REGNUM): Delete.
* irix5-nat.c, mipsv4-nat.c, mips-linux-tdep.c: Update.
* mips-linux-nat.c, remote-mips.c: Update.
Diffstat (limited to 'gdb/config')
-rw-r--r-- | gdb/config/mips/tm-mips.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h index 3fce4fc..678e3f0 100644 --- a/gdb/config/mips/tm-mips.h +++ b/gdb/config/mips/tm-mips.h @@ -43,20 +43,8 @@ extern int mips_step_skips_delay (CORE_ADDR); #define STEP_SKIPS_DELAY_P (1) #define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc)) -/* Register numbers of various important registers. - Note that some of these values are "real" register numbers, - and correspond to the general registers of the machine, - and some are "phony" register numbers which are too large - to be actual register numbers as far as the user is concerned - but do serve to get the desired values when passed to read_register. */ - -#define ZERO_REGNUM 0 /* read-only register, always 0 */ -#define V0_REGNUM 2 /* Function integer return value */ -#define A0_REGNUM 4 /* Loc of first arg during a subr call */ -#define T9_REGNUM 25 /* Contains address of callee in PIC */ #define RA_REGNUM 31 /* Contains return address value */ #define PS_REGNUM 32 /* Contains processor status */ -#define UNUSED_REGNUM 73 /* Never used, FIXME */ #define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */ #define PRID_REGNUM 89 /* Processor ID */ #define LAST_EMBED_REGNUM 89 /* Last one */ |