Initial creation of sourceware repositorygdb-4_18-branchpoint

40 files changed, 2066 insertions, 0 deletions

diff --git a/gdb/config/sparc/linux.mh b/gdb/config/sparc/linux.mh
new file mode 100644
index 0000000..954398f
--- /dev/null
+++ b/gdb/config/sparc/linux.mh
@@ -0,0 +1,7 @@
+# Host: Sparcstation, running Linux
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-linux.h
+NAT_FILE= nm-linux.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o
+HOST_IPC=-DBSD_IPC
+GDBSERVER_DEPFILES= low-sparc.o
diff --git a/gdb/config/sparc/linux.mt b/gdb/config/sparc/linux.mt
new file mode 100644
index 0000000..ca422e9
--- /dev/null
+++ b/gdb/config/sparc/linux.mt
@@ -0,0 +1,3 @@
+# Target: Sparcstation, running Linux
+TDEPFILES= sparc-tdep.o solib.o
+TM_FILE= tm-linux.h
diff --git a/gdb/config/sparc/nbsd.mh b/gdb/config/sparc/nbsd.mh
new file mode 100644
index 0000000..310838d
--- /dev/null
+++ b/gdb/config/sparc/nbsd.mh
@@ -0,0 +1,6 @@
+# Host: Sun 4 or Sparcstation, running NetBSD
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsd.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/sparc/nbsd.mt b/gdb/config/sparc/nbsd.mt
new file mode 100644
index 0000000..be8a348
--- /dev/null
+++ b/gdb/config/sparc/nbsd.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running NetBSD
+TDEPFILES= sparc-tdep.o solib.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/sparc/nm-linux.h b/gdb/config/sparc/nm-linux.h
new file mode 100644
index 0000000..b2b2a91
--- /dev/null
+++ b/gdb/config/sparc/nm-linux.h
@@ -0,0 +1,31 @@
+/* Macro definitions for running gdb on a Sparc running Linux.
+   Copyright (C) 1989, 1992, 1996, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include <nm-sysv4.h>
+#include "solib.h"
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
+
+/* Linux is svr4ish but not that much */
+#undef USE_PROC_FS      
diff --git a/gdb/config/sparc/nm-nbsd.h b/gdb/config/sparc/nm-nbsd.h
new file mode 100644
index 0000000..016772a
--- /dev/null
+++ b/gdb/config/sparc/nm-nbsd.h
@@ -0,0 +1,57 @@
+/* Native-dependent definitions for Sparc running NetBSD, for GDB.
+   Copyright (C) 1986, 1987, 1989, 1992, 1995, 1996
+   Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+
+#include "nm-nbsd.h"
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Before storing, we need to read all the registers.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Make things match up with what is expected in sparc-nat.c.  */
+
+#define regs		trapframe
+#define fp_status	fpstate
+
+#define r_g1		tf_global[1]
+#define r_ps		tf_psr
+#define r_pc		tf_pc
+#define r_npc		tf_npc
+#define r_y		tf_y
+
+#define fpu		fpstate
+#define fpu_regs	fs_regs
+#define fpu_fsr		fs_fsr
+#define fpu_fr		fs_regs
+#define Fpu_fsr		fs_fsr
+#define FPU_FSR_TYPE	int
+
+#define PTRACE_GETREGS	 PT_GETREGS
+#define PTRACE_GETFPREGS PT_GETFPREGS
+#define PTRACE_SETREGS	 PT_SETREGS
+#define PTRACE_SETFPREGS PT_SETFPREGS
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/sparc/nm-sparclynx.h b/gdb/config/sparc/nm-sparclynx.h
new file mode 100644
index 0000000..24011dc
--- /dev/null
+++ b/gdb/config/sparc/nm-sparclynx.h
@@ -0,0 +1,25 @@
+/* Native-dependent definitions for Sparc running LynxOS.
+   Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_SPARCLYNX_H
+#define NM_SPARCLYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_SPARCLYNX_H */
diff --git a/gdb/config/sparc/nm-sun4os4.h b/gdb/config/sparc/nm-sun4os4.h
new file mode 100644
index 0000000..9da96be
--- /dev/null
+++ b/gdb/config/sparc/nm-sun4os4.h
@@ -0,0 +1,35 @@
+/* Macro definitions for running gdb on a Sun 4 running sunos 4.
+   Copyright (C) 1989, 1992, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+/* Do implement the attach and detach commands.  */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Before storing, we need to read all the registers.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
diff --git a/gdb/config/sparc/nm-sun4sol2.h b/gdb/config/sparc/nm-sun4sol2.h
new file mode 100644
index 0000000..f6833f4
--- /dev/null
+++ b/gdb/config/sparc/nm-sun4sol2.h
@@ -0,0 +1,45 @@
+/* Native-dependent definitions for Sparc running SVR4.
+   Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+/* Include the generic SVR4 definitions.  */
+
+#include <nm-sysv4.h>
+
+/* Before storing, we need to read all the registers.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Solaris PSRVADDR support does not seem to include a place for nPC.  */
+
+#define PRSVADDR_BROKEN
+
+#ifdef HAVE_THREAD_DB_LIB
+
+#ifdef __STDC__
+struct objfile;
+#endif
+
+#define target_new_objfile(OBJFILE) sol_thread_new_objfile (OBJFILE)
+
+void sol_thread_new_objfile PARAMS ((struct objfile *objfile));
+
+#define FIND_NEW_THREADS sol_find_new_threads
+void sol_find_new_threads PARAMS ((void));
+
+#endif
diff --git a/gdb/config/sparc/sp64.mt b/gdb/config/sparc/sp64.mt
new file mode 100644
index 0000000..8bb1e07
--- /dev/null
+++ b/gdb/config/sparc/sp64.mt
@@ -0,0 +1,9 @@
+# Target: SPARC64
+# solib.o and procfs.o taken out for now.  We don't have shared libraries yet,
+# and the elf version requires procfs.o but the a.out version doesn't.
+# Then again, having procfs.o in a target makefile fragment seems wrong.
+TDEPFILES = sparc-tdep.o
+TM_FILE= tm-sp64.h
+
+# Need gcc for long long support.
+CC = gcc
diff --git a/gdb/config/sparc/sp64sim.mt b/gdb/config/sparc/sp64sim.mt
new file mode 100644
index 0000000..a9c5ac9
--- /dev/null
+++ b/gdb/config/sparc/sp64sim.mt
@@ -0,0 +1,13 @@
+# Target: SPARC64 (with simulator)
+# solib.o and procfs.o taken out for now.  We don't have shared libraries yet,
+# and the elf version requires procfs.o but the a.out version doesn't.
+# Then again, having procfs.o in a target makefile fragment seems wrong.
+TDEPFILES = sparc-tdep.o
+TM_FILE= tm-sp64.h
+
+# Need gcc for long long support.
+CC = gcc
+
+MH_CFLAGS = -I${srcdir}/../sim/sp64
+SIM_OBS = remote-sim.o
+SIM = ../sim/sp64/libsim.a
diff --git a/gdb/config/sparc/sp64sol2.mt b/gdb/config/sparc/sp64sol2.mt
new file mode 100644
index 0000000..ce2f0d8
--- /dev/null
+++ b/gdb/config/sparc/sp64sol2.mt
@@ -0,0 +1,3 @@
+# Target: Ultrasparc, running Solaris 2
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-sun4sol2.h
diff --git a/gdb/config/sparc/sparc-em.mt b/gdb/config/sparc/sparc-em.mt
new file mode 100644
index 0000000..13b0c6a
--- /dev/null
+++ b/gdb/config/sparc/sparc-em.mt
@@ -0,0 +1,3 @@
+# Target: SPARC embedded
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-spc-em.h
diff --git a/gdb/config/sparc/sparclet.mt b/gdb/config/sparc/sparclet.mt
new file mode 100644
index 0000000..f08cfd7
--- /dev/null
+++ b/gdb/config/sparc/sparclet.mt
@@ -0,0 +1,3 @@
+# Target: SPARC embedded Sparclet monitor
+TDEPFILES= sparc-tdep.o monitor.o sparclet-rom.o dsrec.o
+TM_FILE= tm-sparclet.h
diff --git a/gdb/config/sparc/sparclite.mt b/gdb/config/sparc/sparclite.mt
new file mode 100644
index 0000000..43cb38c
--- /dev/null
+++ b/gdb/config/sparc/sparclite.mt
@@ -0,0 +1,5 @@
+# Target: Fujitsu SPARClite processor
+TDEPFILES= sparc-tdep.o sparcl-tdep.o 
+TM_FILE= tm-sparclite.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/erc32/libsim.a
diff --git a/gdb/config/sparc/sparclynx.mh b/gdb/config/sparc/sparclynx.mh
new file mode 100644
index 0000000..6fddddd
--- /dev/null
+++ b/gdb/config/sparc/sparclynx.mh
@@ -0,0 +1,11 @@
+# Host: Sparc running LynxOS
+
+XM_FILE= xm-sparclynx.h
+XDEPFILES= ser-tcp.o
+XM_CLIBS= -lbsd
+
+NAT_FILE= nm-sparclynx.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o
+
+GDBSERVER_LIBS= -lbsd
+GDBSERVER_DEPFILES= low-lynx.o
diff --git a/gdb/config/sparc/sparclynx.mt b/gdb/config/sparc/sparclynx.mt
new file mode 100644
index 0000000..5e61645
--- /dev/null
+++ b/gdb/config/sparc/sparclynx.mt
@@ -0,0 +1,3 @@
+# Target: Sparc running LynxOS
+TDEPFILES= coff-solib.o sparc-tdep.o
+TM_FILE= tm-sparclynx.h
diff --git a/gdb/config/sparc/sun4os4.mh b/gdb/config/sparc/sun4os4.mh
new file mode 100644
index 0000000..4047c5c
--- /dev/null
+++ b/gdb/config/sparc/sun4os4.mh
@@ -0,0 +1,11 @@
+# Host: Sun 4 or Sparcstation, running SunOS 4
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-sun4os4.h
+NAT_FILE= nm-sun4os4.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o
+HOST_IPC=-DBSD_IPC
+GDBSERVER_DEPFILES= low-sparc.o
+# Setting XM_CLIBS=-lresolv would let us use the DNS, but that would screw
+# anyone who wants to use NIS, which includes at least one Cygnus customer
+# (PR 3593).  So leave it this way until/unless we find a resolver which can
+# get names from either DNS or NIS from the same GDB binary.
diff --git a/gdb/config/sparc/sun4os4.mt b/gdb/config/sparc/sun4os4.mt
new file mode 100644
index 0000000..5a4ecb9
--- /dev/null
+++ b/gdb/config/sparc/sun4os4.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running SunOS 4
+TDEPFILES= sparc-tdep.o solib.o
+TM_FILE= tm-sun4os4.h
diff --git a/gdb/config/sparc/sun4sol2.mh b/gdb/config/sparc/sun4sol2.mh
new file mode 100644
index 0000000..468b362
--- /dev/null
+++ b/gdb/config/sparc/sun4sol2.mh
@@ -0,0 +1,18 @@
+# Host: Sun 4 or Sparcstation, running Solaris 2
+
+XM_FILE= xm-sun4sol2.h
+XDEPFILES= ser-tcp.o
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-sun4sol2.h
+NATDEPFILES= corelow.o core-sol2.o solib.o procfs.o fork-child.o
+
+# If you are compiling with Sun's compiler, add the -xs option to CC
+# (e.g. `make CC="cc -xs"').
+# Sun's compilers require the -xs option to produce debug information
+# in the final linked executable.  Otherwise they leave it in the .o
+# files only, with undocumented pointers to it in the linked executable.
+# This is commented out because we don't assume that the Sun compiler
+# is in use.
+#MH_CFLAGS=-xs
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/sparc/sun4sol2.mt b/gdb/config/sparc/sun4sol2.mt
new file mode 100644
index 0000000..af70e9f
--- /dev/null
+++ b/gdb/config/sparc/sun4sol2.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running Solaris 2
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-sun4sol2.h
diff --git a/gdb/config/sparc/tm-linux.h b/gdb/config/sparc/tm-linux.h
new file mode 100644
index 0000000..2cc708a
--- /dev/null
+++ b/gdb/config/sparc/tm-linux.h
@@ -0,0 +1,29 @@
+/* Macro definitions for GDB for a Sparc running Linux.
+   Copyright 1989, 1992, 1994, 1995, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_SPARCLINUX_H
+#define TM_SPARCLINUX_H
+
+#include "sparc/tm-sparc.h"
+
+#define SIGCONTEXT_PC_OFFSET 12
+
+#include "tm-sysv4.h"
+
+#endif /* TM_SPARCLINUX_H */
diff --git a/gdb/config/sparc/tm-nbsd.h b/gdb/config/sparc/tm-nbsd.h
new file mode 100644
index 0000000..1a31084
--- /dev/null
+++ b/gdb/config/sparc/tm-nbsd.h
@@ -0,0 +1,27 @@
+/* Macro definitions for Sparc running under NetBSD.
+   Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include "sparc/tm-sparc.h"
+
+#include "tm-nbsd.h"
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/sparc/tm-sp64.h b/gdb/config/sparc/tm-sp64.h
new file mode 100644
index 0000000..40a9a62
--- /dev/null
+++ b/gdb/config/sparc/tm-sp64.h
@@ -0,0 +1,378 @@
+/* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
+   This is included by other tm-*.h files to define SPARC64 cpu-related info.
+   Copyright 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
+   This is (obviously) based on the SPARC Vn (n<9) port.
+   Contributed by Doug Evans (dje@cygnus.com).
+   Further modified by Bob Manson (manson@cygnus.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#define GDB_TARGET_IS_SPARC64
+
+#ifdef __STDC__
+struct value;
+#endif
+
+/* Eeeew. Ok, we have to assume (for now) that the processor really is
+   in sparc64 mode. While this is the same instruction sequence as
+   on the Sparc, the stack frames are offset by +2047 (and the arguments
+   are 8 bytes instead of 4). */
+/* Instructions are:
+   std  %f10, [ %fp + 0x7a7 ]
+   std  %f8, [ %fp + 0x79f ]
+   std  %f6, [ %fp + 0x797 ]
+   std  %f4, [ %fp + 0x78f ]
+   std  %f2, [ %fp + 0x787 ]
+   std  %f0, [ %fp + 0x77f ]
+   std  %g6, [ %fp + 0x777 ]
+   std  %g4, [ %fp + 0x76f ]
+   std  %g2, [ %fp + 0x767 ]
+   std  %g0, [ %fp + 0x75f ]
+   std  %fp, [ %fp + 0x757 ]
+   std  %i4, [ %fp + 0x74f ]
+   std  %i2, [ %fp + 0x747 ]
+   std  %i0, [ %fp + 0x73f ]
+   nop
+   nop
+   nop
+   nop
+   rd  %tbr, %o0
+   st  %o0, [ %fp + 0x72b ]
+   rd  %tpc, %o0
+   st  %o0, [ %fp + 0x727 ]
+   rd  %psr, %o0
+   st  %o0, [ %fp + 0x723 ]
+   rd  %y, %o0
+   st  %o0, [ %fp + 0x71f ]
+   ldx  [ %sp + 0x8a7 ], %o5
+   ldx  [ %sp + 0x89f ], %o4
+   ldx  [ %sp + 0x897 ], %o3
+   ldx  [ %sp + 0x88f ], %o2
+   ldx  [ %sp + 0x887 ], %o1
+   call  %g0
+   ldx  [ %sp + 0x87f ], %o0
+   nop
+   ta  1
+   nop
+   nop
+   */
+
+#define CALL_DUMMY {		 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
+				 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
+				 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
+				 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
+				 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
+				 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
+				 0xf03fa73f01000000LL, 0x0100000001000000LL,\
+				 0x0100000091580000LL, 0xd027a72b93500000LL,\
+				 0xd027a72791480000LL, 0xd027a72391400000LL,\
+				 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
+				 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
+				 0x0100000091d02001LL, 0x0100000001000000LL }
+
+
+/* 128 is to reserve space to write the %i/%l registers that will be restored
+   when we resume. */
+#define CALL_DUMMY_STACK_ADJUST 128
+
+#define CALL_DUMMY_LENGTH 192
+
+#define CALL_DUMMY_START_OFFSET 148
+
+#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
+
+#include "sparc/tm-sparc.h"
+
+/* Stack must be aligned on 128-bit boundaries when synthesizing
+   function calls. */
+
+#undef  STACK_ALIGN
+#define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
+
+/* Number of machine registers.  */
+
+#undef  NUM_REGS
+#define NUM_REGS 125
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+/* Some of these registers are only accessible from priviledged mode.
+   They are here for kernel debuggers, etc.  */
+/* FIXME: icc and xcc are currently considered separate registers.
+   This may have to change and consider them as just one (ccr).
+   Let's postpone this as long as we can.  It's nice to be able to set
+   them individually.  */
+/* FIXME: fcc0-3 are currently separate, even though they are also part of
+   fsr.  May have to remove them but let's postpone this as long as
+   possible.  It's nice to be able to set them individually.  */
+/* FIXME: Whether to include f33, f35, etc. here is not clear.
+   There are advantages and disadvantages.  */
+
+#undef  REGISTER_NAMES
+#define REGISTER_NAMES  \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",	\
+  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",	\
+  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",	\
+  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",	\
+								\
+  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",		\
+  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",		\
+  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",	\
+  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",	\
+  "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",	\
+  "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",	\
+                                                                \
+  "pc", "npc", "ccr", "fsr", "fprs", "y", "asi",		\
+  "ver", "tick", "pil", "pstate",				\
+  "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate",		\
+  "cwp", "cansave", "canrestore", "cleanwin", "otherwin",	\
+  "asr16", "asr17", "asr18", "asr19", "asr20", "asr21",		\
+  "asr22", "asr23", "asr24", "asr25", "asr26", "asr27",		\
+  "asr28", "asr29", "asr30", "asr31",				\
+  /* These are here at the end to simplify removing them if we have to.  */ \
+  "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"			\
+}
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#if 0 /* defined in tm-sparc.h, replicated for doc purposes */
+#define	G0_REGNUM 0             /* %g0 */
+#define	G1_REGNUM 1		/* %g1 */
+#define O0_REGNUM 8		/* %o0 */
+#define	SP_REGNUM 14		/* Contains address of top of stack, \
+				   which is also the bottom of the frame.  */
+#define	RP_REGNUM 15		/* Contains return address value, *before* \
+				   any windows get switched.  */
+#define	O7_REGNUM 15		/* Last local reg not saved on stack frame */
+#define	L0_REGNUM 16		/* First local reg that's saved on stack frame
+				   rather than in machine registers */
+#define	I0_REGNUM 24		/* %i0 */
+#define	FP_REGNUM 30		/* Contains address of executing stack frame */
+#define	I7_REGNUM 31		/* Last local reg saved on stack frame */
+#define	FP0_REGNUM 32		/* Floating point register 0 */
+#endif
+
+#define FP_MAX_REGNUM 80	/* 1 + last fp reg number */
+
+/* #undef v8 misc. regs */
+
+#undef Y_REGNUM
+#undef PS_REGNUM
+#undef WIM_REGNUM
+#undef TBR_REGNUM
+#undef PC_REGNUM
+#undef NPC_REGNUM
+#undef FPS_REGNUM
+#undef CPS_REGNUM
+
+/* v9 misc. and priv. regs */
+
+#define C0_REGNUM FP_MAX_REGNUM			/* Start of control registers */
+#define PC_REGNUM (C0_REGNUM + 0)		/* Current PC */
+#define NPC_REGNUM (C0_REGNUM + 1)		/* Next PC */
+#define CCR_REGNUM (C0_REGNUM + 2)		/* Condition Code Register (%xcc,%icc) */
+#define FSR_REGNUM (C0_REGNUM + 3)		/* Floating Point State */
+#define FPRS_REGNUM (C0_REGNUM + 4)		/* Floating Point Registers State */
+#define	Y_REGNUM (C0_REGNUM + 5)		/* Temp register for multiplication, etc.  */
+#define ASI_REGNUM (C0_REGNUM + 6)		/* Alternate Space Identifier */
+#define VER_REGNUM (C0_REGNUM + 7)		/* Version register */
+#define TICK_REGNUM (C0_REGNUM + 8)		/* Tick register */
+#define PIL_REGNUM (C0_REGNUM + 9)		/* Processor Interrupt Level */
+#define PSTATE_REGNUM (C0_REGNUM + 10)		/* Processor State */
+#define TSTATE_REGNUM (C0_REGNUM + 11)		/* Trap State */
+#define TBA_REGNUM (C0_REGNUM + 12)		/* Trap Base Address */
+#define TL_REGNUM (C0_REGNUM + 13)		/* Trap Level */
+#define TT_REGNUM (C0_REGNUM + 14)		/* Trap Type */
+#define TPC_REGNUM (C0_REGNUM + 15)		/* Trap pc */
+#define TNPC_REGNUM (C0_REGNUM + 16)		/* Trap npc */
+#define WSTATE_REGNUM (C0_REGNUM + 17)		/* Window State */
+#define CWP_REGNUM (C0_REGNUM + 18)		/* Current Window Pointer */
+#define CANSAVE_REGNUM (C0_REGNUM + 19)		/* Savable Windows */
+#define CANRESTORE_REGNUM (C0_REGNUM + 20)	/* Restorable Windows */
+#define CLEANWIN_REGNUM (C0_REGNUM + 21)	/* Clean Windows */
+#define OTHERWIN_REGNUM (C0_REGNUM + 22)	/* Other Windows */
+#define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n))	/* Ancillary State Register
+						   (n = 16...31) */
+#define ICC_REGNUM (C0_REGNUM + 39)		/* 32 bit condition codes */
+#define XCC_REGNUM (C0_REGNUM + 40)		/* 64 bit condition codes */
+#define FCC0_REGNUM (C0_REGNUM + 41)		/* fp cc reg 0 */
+#define FCC1_REGNUM (C0_REGNUM + 42)		/* fp cc reg 1 */
+#define FCC2_REGNUM (C0_REGNUM + 43)		/* fp cc reg 2 */
+#define FCC3_REGNUM (C0_REGNUM + 44)		/* fp cc reg 3 */
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.
+   Some of the registers aren't 64 bits, but it's a lot simpler just to assume
+   they all are (since most of them are).  */
+#undef  REGISTER_BYTES
+#define REGISTER_BYTES (32*8+32*8+45*8)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+#undef  REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+  ((N) < 32 ? (N)*8				\
+   : (N) < 64 ? 32*8 + ((N)-32)*4		\
+   : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8	\
+   : 64*8 + ((N)-C0_REGNUM)*8)
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#undef  REGISTER_SIZE
+#define REGISTER_SIZE 8
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  */
+
+#undef  REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) \
+  ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
+
+/* Number of bytes of storage in the program's representation
+   for register N.  */
+
+#undef  REGISTER_VIRTUAL_SIZE
+#define REGISTER_VIRTUAL_SIZE(N) \
+  ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+/* tm-sparc.h defines this as 8, but play it safe.  */
+
+#undef  MAX_REGISTER_RAW_SIZE
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+/* tm-sparc.h defines this as 8, but play it safe.  */
+
+#undef  MAX_REGISTER_VIRTUAL_SIZE
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#undef  REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < 32 ? builtin_type_long_long \
+  : (N) < 64 ? builtin_type_float \
+  : (N) < 80 ? builtin_type_double \
+  : builtin_type_long_long)
+
+/* We use to support both 32 bit and 64 bit pointers.
+   We can't anymore because TARGET_PTR_BIT must now be a constant.  */
+#undef  TARGET_PTR_BIT
+#define TARGET_PTR_BIT 64
+
+/* Longs are 64 bits. */
+#undef TARGET_LONG_BIT
+#define TARGET_LONG_BIT 64
+
+#undef TARGET_LONG_LONG_BIT
+#define TARGET_LONG_LONG_BIT 64
+
+/* Does the specified function use the "struct returning" convention
+   or the "value returning" convention?  The "value returning" convention
+   almost invariably returns the entire value in registers.  The
+   "struct returning" convention often returns the entire value in
+   memory, and passes a pointer (out of or into the function) saying
+   where the value (is or should go).
+
+   Since this sometimes depends on whether it was compiled with GCC,
+   this is also an argument.  This is used in call_function to build a
+   stack, and in value_being_returned to print return values. 
+
+   On Sparc64, we only pass pointers to structs if they're larger then
+   32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
+   values go into %fp0-%fp3).  */
+
+
+#undef  USE_STRUCT_CONVENTION
+#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
+
+#undef REG_STRUCT_HAS_ADDR
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. */
+/* FIXME: V9 uses %o0 for this.  */
+
+#undef  STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+  { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#undef  FRAME_ARGS_SKIP
+#define FRAME_ARGS_SKIP 136
+
+/* Offsets into jmp_buf.
+   FIXME: This was borrowed from the v8 stuff and will probably have to change
+   for v9.  */
+
+#define JB_ELEMENT_SIZE 8	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+extern CORE_ADDR sparc64_read_sp ();
+extern CORE_ADDR sparc64_read_fp ();
+extern void sparc64_write_sp PARAMS ((CORE_ADDR));
+extern void sparc64_write_fp PARAMS ((CORE_ADDR));
+
+#define TARGET_READ_SP() (sparc64_read_sp ())
+#define TARGET_READ_FP() (sparc64_read_fp ())
+#define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
+#define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
+
+CORE_ADDR sp64_push_arguments PARAMS ((int, struct value **, CORE_ADDR, unsigned char, CORE_ADDR));
+#undef PUSH_ARGUMENTS
+#define PUSH_ARGUMENTS(A,B,C,D,E) (sp = sp64_push_arguments ((A), (B), (C), (D), (E)))
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  sparc64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
+extern void
+sparc64_extract_return_value PARAMS ((struct type *, char [], char *, int));
diff --git a/gdb/config/sparc/tm-sp64sim.h b/gdb/config/sparc/tm-sp64sim.h
new file mode 100644
index 0000000..4545f32
--- /dev/null
+++ b/gdb/config/sparc/tm-sp64sim.h
@@ -0,0 +1,50 @@
+/* Macro definitions for GDB with the SPARC64 Simulator.
+   Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+/* ??? This file is based on tm-spc-em.h.  Our contents are probably bogus
+   but it's a good start.  */
+
+#include "sparc/tm-sp64.h"
+#include "tm-sunos.h"
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 8	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sparc.h b/gdb/config/sparc/tm-sparc.h
new file mode 100644
index 0000000..ecbe9e2
--- /dev/null
+++ b/gdb/config/sparc/tm-sparc.h
@@ -0,0 +1,584 @@
+/* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
+   This is included by other tm-*.h files to define SPARC cpu-related info.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
+   Free Software Foundation, Inc.
+   Contributed by Michael Tiemann (tiemann@mcc.com)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifdef __STDC__
+struct frame_info;
+struct type;
+struct value;
+#endif
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Floating point is IEEE compatible.  */
+#define IEEE_FLOAT
+
+/* If an argument is declared "register", Sun cc will keep it in a register,
+   never saving it onto the stack.  So we better not believe the "p" symbol
+   descriptor stab.  */
+
+#define USE_REGISTER_NOT_ARG
+
+/* When passing a structure to a function, Sun cc passes the address
+   not the structure itself.  It (under SunOS4) creates two symbols,
+   which we need to combine to a LOC_REGPARM.  Gcc version two (as of
+   1.92) behaves like sun cc.  REG_STRUCT_HAS_ADDR is smart enough to
+   distinguish between Sun cc, gcc version 1 and gcc version 2.  */
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) (gcc_p != 1)
+
+/* Sun /bin/cc gets this right as of SunOS 4.1.x.  We need to define
+   BELIEVE_PCC_PROMOTION to get this right now that the code which
+   detects gcc2_compiled. is broken.  This loses for SunOS 4.0.x and
+   earlier.  */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* For acc, there's no need to correct LBRAC entries by guessing how
+   they should work.  In fact, this is harmful because the LBRAC
+   entries now all appear at the end of the function, not intermixed
+   with the SLINE entries.  n_opt_found detects acc for Solaris binaries;
+   function_stab_type detects acc for SunOS4 binaries.
+
+   For binary from SunOS4 /bin/cc, need to correct LBRAC's.
+
+   For gcc, like acc, don't correct.  */
+
+#define	SUN_FIXED_LBRAC_BUG \
+  (n_opt_found \
+   || function_stab_type == N_STSYM \
+   || function_stab_type == N_GSYM \
+   || processing_gcc_compilation)
+
+/* Do variables in the debug stabs occur after the N_LBRAC or before it?
+   acc: after, gcc: before, SunOS4 /bin/cc: before.  */
+
+#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
+  (!(gcc_p) \
+   && (n_opt_found \
+       || function_stab_type == N_STSYM \
+       || function_stab_type == N_GSYM))
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  SKIP_PROLOGUE_FRAMELESS_P advances
+   the PC past some of the prologue, but stops as soon as it
+   knows that the function has a frame.  Its result is equal
+   to its input PC if the function is frameless, unequal otherwise.  */
+
+#define SKIP_PROLOGUE(pc) \
+  { pc = skip_prologue (pc, 0); }
+#define SKIP_PROLOGUE_FRAMELESS_P(pc) \
+  { pc = skip_prologue (pc, 1); }
+extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR, int));
+
+/* Immediately after a function call, return the saved pc.
+   Can't go through the frames for this because on some machines
+   the new frame is not set up until the new function executes
+   some instructions.  */
+
+/* On the Sun 4 under SunOS, the compile will leave a fake insn which
+   encodes the structure size being returned.  If we detect such
+   a fake insn, step past it.  */
+
+#define PC_ADJUST(pc) sparc_pc_adjust(pc)
+extern CORE_ADDR sparc_pc_adjust PARAMS ((CORE_ADDR));
+
+#define SAVED_PC_AFTER_CALL(frame) PC_ADJUST (read_register (RP_REGNUM))
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Stack must be aligned on 64-bit boundaries when synthesizing
+   function calls. */
+
+#define STACK_ALIGN(ADDR) (((ADDR) + 7) & -8)
+
+/* Sequence of bytes for breakpoint instruction (ta 1). */
+
+#define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
+
+/* Amount PC must be decremented by after a breakpoint.
+   This is often the number of bytes in BREAKPOINT
+   but not always.  */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 72
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#define REGISTER_NAMES  \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",	\
+  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",	\
+  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",	\
+  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",	\
+								\
+  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",	\
+  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",	\
+  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",	\
+  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",	\
+                                                                \
+  "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" }
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define	G0_REGNUM 0             /* %g0 */
+#define	G1_REGNUM 1		/* %g1 */
+#define O0_REGNUM 8		/* %o0 */
+#define	SP_REGNUM 14		/* Contains address of top of stack, \
+				   which is also the bottom of the frame.  */
+#define	RP_REGNUM 15		/* Contains return address value, *before* \
+				   any windows get switched.  */
+#define	O7_REGNUM 15		/* Last local reg not saved on stack frame */
+#define	L0_REGNUM 16		/* First local reg that's saved on stack frame
+				   rather than in machine registers */
+#define	I0_REGNUM 24		/* %i0 */
+#define	FP_REGNUM 30		/* Contains address of executing stack frame */
+#define	I7_REGNUM 31		/* Last local reg saved on stack frame */
+#define	FP0_REGNUM 32		/* Floating point register 0 */
+#define	Y_REGNUM 64		/* Temp register for multiplication, etc.  */
+#define	PS_REGNUM 65		/* Contains processor status */
+#define PS_FLAG_CARRY 0x100000	/* Carry bit in PS */
+#define	WIM_REGNUM 66		/* Window Invalid Mask (not really supported) */
+#define	TBR_REGNUM 67		/* Trap Base Register (not really supported) */
+#define	PC_REGNUM 68		/* Contains program counter */
+#define	NPC_REGNUM 69           /* Contains next PC */
+#define	FPS_REGNUM 70		/* Floating point status register */
+#define	CPS_REGNUM 71		/* Coprocessor status register */
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  On the sparc, `registers'
+   contains the ins and locals, even though they are saved on the
+   stack rather than with the other registers, and this causes hair
+   and confusion in places like pop_frame.  It might be
+   better to remove the ins and locals from `registers', make sure
+   that get_saved_register can get them from the stack (even in the
+   innermost frame), and make this the way to access them.  For the
+   frame pointer we would do that via TARGET_READ_FP.  On the other hand,
+   that is likely to be confusing or worse for flat frames.  */
+
+#define REGISTER_BYTES (32*4+32*4+8*4)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+/* ?? */
+#define REGISTER_BYTE(N)  ((N)*4)
+
+/* We need to override GET_SAVED_REGISTER so that we can deal with the way
+   outs change into ins in different frames.  HAVE_REGISTER_WINDOWS can't
+   deal with this case and also handle flat frames at the same time.  */
+
+#define GET_SAVED_REGISTER 1
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  */
+
+/* On the SPARC, all regs are 4 bytes.  */
+
+#define REGISTER_RAW_SIZE(N) (4)
+
+/* Number of bytes of storage in the program's representation
+   for register N.  */
+
+/* On the SPARC, all regs are 4 bytes.  */
+
+#define REGISTER_VIRTUAL_SIZE(N) (4)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < 32 ? builtin_type_int : (N) < 64 ? builtin_type_float : \
+  builtin_type_int)
+
+/* Writing to %g0 is a noop (not an error or exception or anything like
+   that, however).  */
+
+#define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function_by_hand. 
+   The ultimate mystery is, tho, what is the value "16"?  */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+  { char val[4]; \
+    store_unsigned_integer (val, 4, (ADDR)); \
+    write_memory ((SP)+(16*4), val, 4); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  sparc_extract_return_value(TYPE, REGBUF, VALBUF)
+extern void
+sparc_extract_return_value PARAMS ((struct type *, char [], char *));
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  */
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  sparc_store_return_value(TYPE, VALBUF)
+extern void sparc_store_return_value PARAMS ((struct type *, char *));
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+  (sparc_extract_struct_value_address (REGBUF))
+
+extern CORE_ADDR
+sparc_extract_struct_value_address PARAMS ((char [REGISTER_BYTES]));
+
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address
+   and produces the frame's chain-pointer. */
+
+/* In the case of the Sun 4, the frame-chain's nominal address
+   is held in the frame pointer register.
+
+   On the Sun4, the frame (in %fp) is %sp for the previous frame.
+   From the previous frame's %sp, we can find the previous frame's
+   %fp: it is in the save area just above the previous frame's %sp.
+
+   If we are setting up an arbitrary frame, we'll need to know where
+   it ends.  Hence the following.  This part of the frame cache
+   structure should be checked before it is assumed that this frame's
+   bottom is in the stack pointer.
+
+   If there isn't a frame below this one, the bottom of this frame is
+   in the stack pointer.
+
+   If there is a frame below this one, and the frame pointers are
+   identical, it's a leaf frame and the bottoms are the same also.
+
+   Otherwise the bottom of this frame is the top of the next frame.
+
+   The bottom field is misnamed, since it might imply that memory from
+   bottom to frame contains this frame.  That need not be true if
+   stack frames are allocated in different segments (e.g. some on a
+   stack, some on a heap in the data segment).
+
+   GCC 2.6 and later can generate ``flat register window'' code that
+   makes frames by explicitly saving those registers that need to be
+   saved.  %i7 is used as the frame pointer, and the frame is laid out so
+   that flat and non-flat calls can be intermixed freely within a
+   program.  Unfortunately for GDB, this means it must detect and record
+   the flatness of frames.
+
+   Since the prologue in a flat frame also tells us where fp and pc
+   have been stashed (the frame is of variable size, so their location
+   is not fixed), it's convenient to record them in the frame info.  */
+
+#define EXTRA_FRAME_INFO  \
+  CORE_ADDR bottom;  \
+  int in_prologue; \
+  int flat;  \
+  /* Following fields only relevant for flat frames.  */ \
+  CORE_ADDR pc_addr;  \
+  CORE_ADDR fp_addr;  \
+  /* Add this to ->frame to get the value of the stack pointer at the */ \
+  /* time of the register saves.  */ \
+  int sp_offset;
+
+#define FRAME_INIT_SAVED_REGS(fp) /*no-op*/
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) \
+  sparc_init_extra_frame_info (fromleaf, fci)
+extern void sparc_init_extra_frame_info PARAMS((int, struct frame_info *));
+
+#define	PRINT_EXTRA_FRAME_INFO(fi) \
+  { \
+    if ((fi) && (fi)->flat) \
+      printf_filtered (" flat, pc saved at 0x%x, fp saved at 0x%x\n", \
+                       (fi)->pc_addr, (fi)->fp_addr); \
+  }
+
+#define FRAME_CHAIN(thisframe) (sparc_frame_chain (thisframe))
+extern CORE_ADDR sparc_frame_chain PARAMS ((struct frame_info *));
+
+/* INIT_EXTRA_FRAME_INFO needs the PC to detect flat frames.  */
+
+#define	INIT_FRAME_PC(fromleaf, prev) /* nothing */
+#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
+  (prev)->pc = ((fromleaf) ? SAVED_PC_AFTER_CALL ((prev)->next) : \
+	      (prev)->next ? FRAME_SAVED_PC ((prev)->next) : read_pc ());
+
+/* Define other aspects of the stack frame.  */
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+  (FRAMELESS) = frameless_look_for_prologue(FI)
+
+/* The location of I0 w.r.t SP.  This is actually dependent on how the system's
+   window overflow/underflow routines are written.  Most vendors save the L regs
+   followed by the I regs (at the higher address).  Some vendors get it wrong.
+ */
+
+#define	FRAME_SAVED_L0	0
+#define	FRAME_SAVED_I0	(8 * REGISTER_RAW_SIZE (L0_REGNUM))
+
+/* Where is the PC for a specific frame */
+
+#define FRAME_SAVED_PC(FRAME) sparc_frame_saved_pc (FRAME)
+extern CORE_ADDR sparc_frame_saved_pc PARAMS ((struct frame_info *));
+
+/* If the argument is on the stack, it will be here.  */
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_STRUCT_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+   Can set VAL to -1, meaning no way to tell.  */
+
+/* We can't tell how many args there are
+   now that the C compiler delays popping them.  */
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 68
+
+/* Things needed for making the inferior call functions.  */
+/*
+ * First of all, let me give my opinion of what the DUMMY_FRAME
+ * actually looks like.
+ *
+ *               |                                 |
+ *               |                                 |
+ *               + - - - - - - - - - - - - - - - - +<-- fp (level 0)
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |  Frame of innermost program     |
+ *               |           function              |
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |---------------------------------|<-- sp (level 0), fp (c)
+ *               |                                 |
+ *     DUMMY     |             fp0-31              |
+ *               |                                 |
+ *               |             ------              |<-- fp - 0x80
+ *     FRAME     |              g0-7               |<-- fp - 0xa0
+ *               |              i0-7               |<-- fp - 0xc0
+ *               |             other               |<-- fp - 0xe0
+ *               |               ?                 |
+ *               |               ?                 |
+ *               |---------------------------------|<-- sp' = fp - 0x140
+ *               |                                 |
+ * xcution start |                                 |
+ * sp' + 0x94 -->|        CALL_DUMMY (x code)      |
+ *               |                                 |
+ *               |                                 |
+ *               |---------------------------------|<-- sp'' = fp - 0x200
+ *               |  align sp to 8 byte boundary    |
+ *               |     ==> args to fn <==          |
+ *  Room for     |                                 |
+ * i & l's + agg | CALL_DUMMY_STACK_ADJUST = 0x0x44|
+ *               |---------------------------------|<-- final sp (variable)
+ *               |                                 |
+ *               |   Where function called will    |
+ *               |           build frame.          |
+ *               |                                 |
+ *               |                                 |
+ *
+ *   I understand everything in this picture except what the space
+ * between fp - 0xe0 and fp - 0x140 is used for.  Oh, and I don't
+ * understand why there's a large chunk of CALL_DUMMY that never gets
+ * executed (its function is superceeded by PUSH_DUMMY_FRAME; they
+ * are designed to do the same thing).
+ *
+ *   PUSH_DUMMY_FRAME saves the registers above sp' and pushes the
+ * register file stack down one.
+ *
+ *   call_function then writes CALL_DUMMY, pushes the args onto the
+ * stack, and adjusts the stack pointer.
+ *
+ *   run_stack_dummy then starts execution (in the middle of
+ * CALL_DUMMY, as directed by call_function).
+ */
+
+/* Push an empty stack frame, to record the current PC, etc.  */
+
+#define PUSH_DUMMY_FRAME	sparc_push_dummy_frame ()
+#define POP_FRAME	sparc_pop_frame ()
+
+void sparc_push_dummy_frame PARAMS ((void)), sparc_pop_frame PARAMS ((void));
+
+#ifndef CALL_DUMMY
+/* This sequence of words is the instructions
+
+   0:   bc 10 00 01     mov  %g1, %fp
+   4:   9d e3 80 00     save  %sp, %g0, %sp
+   8:   bc 10 00 02     mov  %g2, %fp
+   c:   be 10 00 03     mov  %g3, %i7
+  10:   da 03 a0 58     ld  [ %sp + 0x58 ], %o5
+  14:   d8 03 a0 54     ld  [ %sp + 0x54 ], %o4
+  18:   d6 03 a0 50     ld  [ %sp + 0x50 ], %o3
+  1c:   d4 03 a0 4c     ld  [ %sp + 0x4c ], %o2
+  20:   d2 03 a0 48     ld  [ %sp + 0x48 ], %o1
+  24:   40 00 00 00     call  <fun>
+  28:   d0 03 a0 44     ld  [ %sp + 0x44 ], %o0
+  2c:   01 00 00 00     nop 
+  30:   91 d0 20 01     ta  1
+  34:   01 00 00 00     nop
+
+   NOTES:
+	* the first four instructions are necessary only on the simulator.
+	* this is a multiple of 8 (not only 4) bytes.
+	* the `call' insn is a relative, not an absolute call.
+	* the `nop' at the end is needed to keep the trap from
+	  clobbering things (if NPC pointed to garbage instead).
+*/
+
+#define CALL_DUMMY { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,	\
+		     0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,	\
+		     0xd203a048, 0x40000000, 0xd003a044, 0x01000000,	\
+		     0x91d02001, 0x01000000 }
+
+
+/* Size of the call dummy in bytes. */
+
+#define CALL_DUMMY_LENGTH 0x38
+
+/* Offset within call dummy of first instruction to execute. */
+
+#define CALL_DUMMY_START_OFFSET 0
+
+/* Offset within CALL_DUMMY of the 'call' instruction. */
+
+#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + 0x24)
+
+/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + 0x30)
+
+#define CALL_DUMMY_STACK_ADJUST 68
+
+#endif
+/* Insert the specified number of args and function address
+   into a call sequence of the above form stored at DUMMYNAME.  */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
+void sparc_fix_call_dummy PARAMS ((char *dummy, CORE_ADDR pc, CORE_ADDR fun,
+				   struct type *value_type, int using_gcc));
+
+/* The Sparc returns long doubles on the stack.  */
+
+#define RETURN_VALUE_ON_STACK(TYPE) \
+  (TYPE_CODE(TYPE) == TYPE_CODE_FLT \
+   && TYPE_LENGTH(TYPE) > 8)
+
+/* Sparc has no reliable single step ptrace call */
+
+#define SOFTWARE_SINGLE_STEP_P 1
+extern void sparc_software_single_step PARAMS ((unsigned int, int));
+#define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p)
+
+/* We need more arguments in a frame specification for the
+   "frame" or "info frame" command.  */
+
+#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
+extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
+
+/* To print every pair of float registers as a double, we use this hook.
+   We also print the condition code registers in a readable format
+   (FIXME: can expand this to all control regs).  */
+
+#undef 	PRINT_REGISTER_HOOK
+#define	PRINT_REGISTER_HOOK(regno)	\
+  sparc_print_register_hook (regno)
+extern void sparc_print_register_hook PARAMS ((int regno));
+
+
+/* Optimization for storing registers to the inferior.  The hook
+   DO_DEFERRED_STORES
+   actually executes any deferred stores.  It is called any time
+   we are going to proceed the child, or read its registers.
+   The hook CLEAR_DEFERRED_STORES is called when we want to throw
+   away the inferior process, e.g. when it dies or we kill it.
+   FIXME, this does not handle remote debugging cleanly.  */
+
+extern int deferred_stores;
+#define	DO_DEFERRED_STORES	\
+  if (deferred_stores)		\
+    target_store_registers (-2);
+#define	CLEAR_DEFERRED_STORES	\
+  deferred_stores = 0;
+
+/* If the current gcc for for this target does not produce correct debugging
+   information for float parameters, both prototyped and unprototyped, then
+   define this macro.  This forces gdb to  always assume that floats are
+   passed as doubles and then converted in the callee. */
+
+#define COERCE_FLOAT_TO_DOUBLE 1
+
+/* Select the sparc disassembler */
+
+#define TM_PRINT_INSN_MACH bfd_mach_sparc
+
+/* Arguments smaller than an int must promoted to ints when synthesizing
+   function calls.  */
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+    sp = sparc_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR
+sparc_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
diff --git a/gdb/config/sparc/tm-sparclet.h b/gdb/config/sparc/tm-sparclet.h
new file mode 100644
index 0000000..bc43083
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclet.h
@@ -0,0 +1,132 @@
+/* Target machine definitions for GDB for an embedded SPARC.
+   Copyright 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include "sparc/tm-sparc.h"
+
+#define TARGET_SPARCLET 1
+
+/* Select the sparclet disassembler.  Slightly different instruction set from
+   the V8 sparc.  */
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclet
+
+/* overrides of tm-sparc.h */
+
+#undef TARGET_BYTE_ORDER
+#define TARGET_BYTE_ORDER_SELECTABLE
+
+/* Sequence of bytes for breakpoint instruction (ta 1). */
+#undef BREAKPOINT
+#define BIG_BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
+#define LITTLE_BREAKPOINT {0x01, 0x20, 0xd0, 0x91}
+
+#undef  NUM_REGS /* formerly "72" */
+/*                WIN  FP   CPU  CCP  ASR  AWR  APSR */
+#define NUM_REGS (32 + 32 + 8  + 8  + 8/*+ 32 + 1*/)
+
+#undef  REGISTER_BYTES /* formerly "(32*4 + 32*4 + 8*4)" */
+#define REGISTER_BYTES (32*4 + 32*4 + 8*4 + 8*4 + 8*4/* + 32*4 + 1*4*/)
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+/* Sparclet has no fp! */
+/* Compiler maps types for floats by number, so can't 
+   change the numbers here. */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES  \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",	\
+  "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7",	\
+  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",	\
+  "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7",	\
+							\
+  "", "", "", "", "", "", "", "", /* no FPU regs */	\
+  "", "", "", "", "", "", "", "", 			\
+  "", "", "", "", "", "", "", "", 			\
+  "", "", "", "", "", "", "", "", 			\
+				  /* no CPSR, FPSR */	\
+  "y", "psr", "wim", "tbr", "pc", "npc", "", "", 	\
+							\
+  "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "", \
+								  \
+  /*       ASR15                 ASR19 (don't display them) */    \
+  "asr1",  "", "asr17", "asr18", "", "asr20", "asr21", "asr22",   \
+/*									  \
+  "awr0",  "awr1",  "awr2",  "awr3",  "awr4",  "awr5",  "awr6",  "awr7",  \
+  "awr8",  "awr9",  "awr10", "awr11", "awr12", "awr13", "awr14", "awr15", \
+  "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23", \
+  "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31", \
+  "apsr",								  \
+ */									  \
+}
+
+/* Remove FP dependant code which was defined in tm-sparc.h */
+#undef	FP0_REGNUM /* Floating point register 0 */
+#undef	FPS_REGNUM /* Floating point status register */
+#undef 	CPS_REGNUM /* Coprocessor status register */
+
+/* sparclet register numbers */
+#define CCSR_REGNUM 72
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF)                       \
+  {                                                                    \
+    memcpy ((VALBUF),                                                  \
+	    (char *)(REGBUF) + REGISTER_RAW_SIZE (O0_REGNUM) * 8 +     \
+	    (TYPE_LENGTH(TYPE) >= REGISTER_RAW_SIZE (O0_REGNUM)        \
+	     ? 0 : REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH(TYPE)), \
+	    TYPE_LENGTH(TYPE));                                        \
+  }
+#undef STORE_RETURN_VALUE
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  {                                                                    \
+    /* Other values are returned in register %o0.  */                  \
+    write_register_bytes (REGISTER_BYTE (O0_REGNUM), (VALBUF),         \
+			  TYPE_LENGTH (TYPE));                         \
+  }
+
+#undef PRINT_REGISTER_HOOK
+#define PRINT_REGISTER_HOOK(regno)
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sparclite.h b/gdb/config/sparc/tm-sparclite.h
new file mode 100644
index 0000000..d841f89
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclite.h
@@ -0,0 +1,98 @@
+/* Macro definitions for GDB for a Fujitsu SPARClite.
+   Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#define TARGET_SPARCLITE 1
+
+#include "sparc/tm-sparc.h"
+
+/* overrides of tm-sparc.h */
+
+#undef TARGET_BYTE_ORDER
+#define TARGET_BYTE_ORDER_SELECTABLE
+
+/* Select the sparclite disassembler.  Slightly different instruction set from
+   the V8 sparc.  */
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclite
+
+/* Amount PC must be decremented by after a hardware instruction breakpoint.
+   This is often the number of bytes in BREAKPOINT
+   but not always.  */
+
+#define DECR_PC_AFTER_HW_BREAK 4
+
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+#undef NUM_REGS 
+#define NUM_REGS 80 
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (32*4+32*4+8*4+8*4)
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES  \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",       \
+  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",       \
+  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",       \
+  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",       \
+                                                                \
+  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",       \
+  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",       \
+  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",       \
+                                                                \
+  "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",        \
+  "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr" }
+
+#define DIA1_REGNUM 72          /* debug instr address register 1 */
+#define DIA2_REGNUM 73          /* debug instr address register 2 */
+#define DDA1_REGNUM 74          /* debug data address register 1 */
+#define DDA2_REGNUM 75          /* debug data address register 2 */
+#define DDV1_REGNUM 76          /* debug data value register 1 */
+#define DDV2_REGNUM 77          /* debug data value register 2 */
+#define DCR_REGNUM 78           /* debug control register */
+#define DSR_REGNUM 79           /* debug status regsiter */
+
+#define TARGET_HW_BREAK_LIMIT 2
+#define TARGET_HW_WATCH_LIMIT 2
+
+/* Enable watchpoint macro's */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+	sparclite_check_watch_resources (type, cnt, ot)
+
+/* When a hardware watchpoint fires off the PC will be left at the
+   instruction which caused the watchpoint.  It will be necessary for
+   GDB to step over the watchpoint. ***
+
+#define STOPPED_BY_WATCHPOINT(W) \
+  ((W).kind == TARGET_WAITKIND_STOPPED \
+   && (W).value.sig == TARGET_SIGNAL_TRAP \
+   && ((int) read_register (IPSW_REGNUM) & 0x00100000))
+*/
+
+/* Use these macros for watchpoint insertion/deletion.  */
+#define target_insert_watchpoint(addr, len, type) sparclite_insert_watchpoint (addr, len, type)
+#define target_remove_watchpoint(addr, len, type) sparclite_remove_watchpoint (addr, len, type)
+#define target_insert_hw_breakpoint(addr, len) sparclite_insert_hw_breakpoint (addr, len)
+#define target_remove_hw_breakpoint(addr, len) sparclite_remove_hw_breakpoint (addr, len)
+#define target_stopped_data_address() sparclite_stopped_data_address()
diff --git a/gdb/config/sparc/tm-sparclynx.h b/gdb/config/sparc/tm-sparclynx.h
new file mode 100644
index 0000000..5a0d908
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclynx.h
@@ -0,0 +1,36 @@
+/* Macro definitions for Sparc running under LynxOS.
+   Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_SPARCLYNX_H
+#define TM_SPARCLYNX_H
+
+#include "tm-lynx.h"
+
+/* Use generic Sparc definitions. */
+#include "sparc/tm-sparc.h"
+
+/* Lynx does this backwards from everybody else */
+
+#undef FRAME_SAVED_I0
+#undef FRAME_SAVED_L0
+
+#define FRAME_SAVED_I0 0
+#define FRAME_SAVED_L0 (8 * REGISTER_RAW_SIZE (I0_REGNUM))
+
+#endif /* TM_SPARCLYNX_H */
diff --git a/gdb/config/sparc/tm-spc-em.h b/gdb/config/sparc/tm-spc-em.h
new file mode 100644
index 0000000..3a9b457
--- /dev/null
+++ b/gdb/config/sparc/tm-spc-em.h
@@ -0,0 +1,46 @@
+/* Target machine definitions for GDB for an embedded SPARC.
+   Copyright 1989, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include "sparc/tm-sparc.h"
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sun4os4.h b/gdb/config/sparc/tm-sun4os4.h
new file mode 100644
index 0000000..985e18c
--- /dev/null
+++ b/gdb/config/sparc/tm-sun4os4.h
@@ -0,0 +1,58 @@
+/* Macro definitions for GDB for a Sun 4 running sunos 4.
+   Copyright 1989, 1992, 1994, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include "sparc/tm-sparc.h"
+#include "tm-sunos.h"
+
+/* Redefine SKIP_TRAMPOLINE_CODE to handle PIC compiled modules
+   in main executables.  */
+
+#undef SKIP_TRAMPOLINE_CODE
+#define SKIP_TRAMPOLINE_CODE(pc)  sunos4_skip_trampoline_code (pc)
+extern CORE_ADDR sunos4_skip_trampoline_code PARAMS ((CORE_ADDR));
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+extern char *sunpro_static_transform_name PARAMS ((char *));
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#define IS_STATIC_TRANSFORM_NAME(name) ((name)[0] == '$')
diff --git a/gdb/config/sparc/tm-sun4sol2.h b/gdb/config/sparc/tm-sun4sol2.h
new file mode 100644
index 0000000..7bab6e6
--- /dev/null
+++ b/gdb/config/sparc/tm-sun4sol2.h
@@ -0,0 +1,94 @@
+/* Macro definitions for GDB for a Sun 4 running Solaris 2
+   Copyright 1989, 1992, 1993, 1994, 1995, 1997, 1998
+   Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include "sparc/tm-sparc.h"
+#include "tm-sysv4.h"
+ 
+/* There are two different signal handler trampolines in Solaris2.  */
+#define IN_SIGTRAMP(pc, name) \
+  ((name) \
+   && (STREQ ("sigacthandler", name) || STREQ ("ucbsigvechandler", name)))
+ 
+/* The signal handler gets a pointer to an ucontext as third argument
+   if it is called from sigacthandler.  This is the offset to the saved
+   PC within it.  sparc_frame_saved_pc knows how to deal with
+   ucbsigvechandler.  */  
+#define SIGCONTEXT_PC_OFFSET 44
+
+#if 0	/* FIXME Setjmp/longjmp are not as well doc'd in SunOS 5.x yet */
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+#endif  /* 0 */
+
+/* The SunPRO compiler puts out 0 instead of the address in N_SO symbols,
+   and for SunPRO 3.0, N_FUN symbols too.  */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+extern char *sunpro_static_transform_name PARAMS ((char *));
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#define IS_STATIC_TRANSFORM_NAME(name) ((name)[0] == '$')
+
+#define FAULTED_USE_SIGINFO
+
+/* Enable handling of shared libraries for a.out executables.  */
+#define HANDLE_SVR4_EXEC_EMULATORS
+
+/* Macros to extract process id and thread id from a composite pid/tid */
+#define PIDGET(pid) ((pid) & 0xffff)
+#define TIDGET(pid) (((pid) >> 16) & 0xffff)
+
+/* Macro to extract carry from given regset.  */
+#define PROCFS_GET_CARRY(regset) ((regset)[R_PSR] & PS_FLAG_CARRY)
+
+#ifdef HAVE_THREAD_DB_LIB
+
+extern char *solaris_pid_to_str PARAMS ((int pid));
+#define target_pid_to_str(PID) solaris_pid_to_str (PID)
+
+#else
+
+extern char *procfs_pid_to_str PARAMS ((int pid));
+#define target_pid_to_str(PID) procfs_pid_to_str (PID)
+
+#endif
diff --git a/gdb/config/sparc/tm-vxsparc.h b/gdb/config/sparc/tm-vxsparc.h
new file mode 100644
index 0000000..6612943
--- /dev/null
+++ b/gdb/config/sparc/tm-vxsparc.h
@@ -0,0 +1,36 @@
+/* Target machine description for VxWorks sparc's, for GDB, the GNU debugger.
+   Copyright 1993 Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#define	GDBINIT_FILENAME	".vxgdbinit"
+
+#define	DEFAULT_PROMPT		"(vxgdb) "
+
+#include "sparc/tm-spc-em.h"
+
+/* FIXME: These are almost certainly wrong. */
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (NUM_REGS)
+
+/* Number of registers in a ptrace_getfpregs call. */
+
+/* #define VX_SIZE_FPREGS (don't know how many) */
+
diff --git a/gdb/config/sparc/vxsparc.mt b/gdb/config/sparc/vxsparc.mt
new file mode 100644
index 0000000..9eadd17
--- /dev/null
+++ b/gdb/config/sparc/vxsparc.mt
@@ -0,0 +1,3 @@
+# Target: SPARC running VxWorks
+TDEPFILES= sparc-tdep.o remote-vx.o remote-vxsparc.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vxsparc.h
diff --git a/gdb/config/sparc/xm-linux.h b/gdb/config/sparc/xm-linux.h
new file mode 100644
index 0000000..7d68b63
--- /dev/null
+++ b/gdb/config/sparc/xm-linux.h
@@ -0,0 +1,48 @@
+/* Macro definitions for running gdb on a Sparc running Linux.
+   Copyright (C) 1989, 1993, 1994, 1995, 1996, 1998
+   Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_SPARCLINUX_H
+#define XM_SPARCLINUX_H
+
+#include "sparc/xm-sparc.h"
+
+#define HAVE_TERMIOS
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+#define U_REGS_OFFSET 0
+
+#define NEED_POSIX_SETPGID
+
+/* Need R_OK etc, but USG isn't defined.  */
+#include <unistd.h>
+
+/* If you expect to use the mmalloc package to obtain mapped symbol files,
+   for now you have to specify some parameters that determine how gdb places
+   the mappings in it's address space.  See the comments in map_to_address()
+   for details.  This is expected to only be a short term solution.  Yes it
+   is a kludge.
+   FIXME:  Make this more automatic. */
+
+#define MMAP_BASE_ADDRESS      0xE0000000      /* First mapping here */
+#define MMAP_INCREMENT         0x01000000      /* Increment to next mapping */
+
+#endif /* _XM_SPARCLINUX_H */
diff --git a/gdb/config/sparc/xm-nbsd.h b/gdb/config/sparc/xm-nbsd.h
new file mode 100644
index 0000000..95fe846
--- /dev/null
+++ b/gdb/config/sparc/xm-nbsd.h
@@ -0,0 +1,21 @@
+/* Parameters for execution on a Sparc running NetBSD, for GDB.
+   Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/sparc/xm-sparc.h b/gdb/config/sparc/xm-sparc.h
new file mode 100644
index 0000000..06c247e
--- /dev/null
+++ b/gdb/config/sparc/xm-sparc.h
@@ -0,0 +1,22 @@
+/* Host definitions for a Sun 4, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1996
+   Free Software Foundation, Inc.
+   Contributed by Michael Tiemann (tiemann@mcc.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
diff --git a/gdb/config/sparc/xm-sparclynx.h b/gdb/config/sparc/xm-sparclynx.h
new file mode 100644
index 0000000..7e62628
--- /dev/null
+++ b/gdb/config/sparc/xm-sparclynx.h
@@ -0,0 +1,24 @@
+/* Host-dependent definitions for Sparc running LynxOS, for GDB.
+   Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Get generic LynxOS host definitions. */
+
+#include "xm-lynx.h"
diff --git a/gdb/config/sparc/xm-sun4os4.h b/gdb/config/sparc/xm-sun4os4.h
new file mode 100644
index 0000000..e50a213
--- /dev/null
+++ b/gdb/config/sparc/xm-sun4os4.h
@@ -0,0 +1,34 @@
+/* Macro definitions for running gdb on a Sun 4 running sunos 4.
+   Copyright (C) 1989, 1993, 1994, 1995, 1996
+   Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include "sparc/xm-sparc.h"
+
+#define FPU
+
+/* /usr/include/malloc.h is included by vx-share/xdr_ld, and might
+   declare these using char * not void *.  The following should work with
+   acc, gcc, or /bin/cc.  */
+
+#define MALLOC_INCOMPATIBLE
+#include <malloc.h>
+
+/* SunOS 4.x uses nonstandard "char *" as type of third argument to ptrace() */
+
+#define PTRACE_ARG3_TYPE char*
diff --git a/gdb/config/sparc/xm-sun4sol2.h b/gdb/config/sparc/xm-sun4sol2.h
new file mode 100644
index 0000000..bc49ce4
--- /dev/null
+++ b/gdb/config/sparc/xm-sun4sol2.h
@@ -0,0 +1,49 @@
+/* Macro definitions for running gdb on a Sun 4 running Solaris 2.
+   Copyright 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+/* Most of what we know is generic to SPARC hosts.  */
+
+#include "sparc/xm-sparc.h"
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "xm-sysv4.h"
+
+/* gdb wants to use the prgregset_t interface rather than
+   the gregset_t interface, partly because that's what's
+   used in core-sol2.c */
+
+#define GDB_GREGSET_TYPE prgregset_t
+#define GDB_FPREGSET_TYPE prfpregset_t
+
+/* These are not currently used in SVR4 (but should be, FIXME!).  */
+#undef	DO_DEFERRED_STORES
+#undef	CLEAR_DEFERRED_STORES
+
+/* May be needed, may be not?  From Pace Willisson's port.  FIXME.  */
+#define NEED_POSIX_SETPGID
+
+/* solaris doesn't have siginterrupt, though it has sigaction; however,
+   in this case siginterrupt would just be setting the default. */
+#define NO_SIGINTERRUPT
+
+/* On sol2.7, <curses.h> emits a bunch of 'macro redefined'
+   warnings, which makes autoconf think curses.h doesn't
+   exist.  Compensate fot that here. */
+#define HAVE_CURSES_H 1