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authorStan Shebs <shebs@codesourcery.com>1994-11-18 02:18:09 +0000
committerStan Shebs <shebs@codesourcery.com>1994-11-18 02:18:09 +0000
commit9f9f94aa0930f4981532e953b54cd028c0a556c6 (patch)
treea8883913199df90d3b6da24ffb4e8d67c6df283c /gdb/config/mips
parentf618f758e9a906a72356156c5be69e37647fe18e (diff)
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Support for different MIPS IDT processor models.
* mips-tdep.c (mips_processor_type, tmp_mips_processor_type, mips_generic_reg_names, mips_r3041_reg_names, mips_r3051_reg_names, mips_r3081_reg_names, mips_processor_type_table): New globals. (mips_do_registers_info): Don't display register if name is empty. (mips_set_processor_type_command): New command. (mips_show_processor_type_command): New command. (mips_set_processor_type): New function. (mips_read_processor_type): New function. * config/mips/tm-idt.h (DEFAULT_MIPS_TYPE): New macro. * config/mips/tm-mips.h (DEFAULT_MIPS_TYPE): New macro. (NUM_REGS): Increase to account for all CP0 registers. (REGISTER_NAMES): Add empty names for CP0 registers. (FIRST_EMBED_REGNUM, LAST_EMBED_REGNUM): Adjust. (PRID_REGNUM): New macro.
Diffstat (limited to 'gdb/config/mips')
-rw-r--r--gdb/config/mips/tm-idt.h3
-rw-r--r--gdb/config/mips/tm-mips.h20
2 files changed, 16 insertions, 7 deletions
diff --git a/gdb/config/mips/tm-idt.h b/gdb/config/mips/tm-idt.h
index e53e5e7..ab9d28b 100644
--- a/gdb/config/mips/tm-idt.h
+++ b/gdb/config/mips/tm-idt.h
@@ -19,3 +19,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#define TARGET_BYTE_ORDER_SELECTABLE
#include "mips/tm-bigmips.h"
+
+#undef DEFAULT_MIPS_TYPE
+#define DEFAULT_MIPS_TYPE "r3051"
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
index 2184aab..cb20c68 100644
--- a/gdb/config/mips/tm-mips.h
+++ b/gdb/config/mips/tm-mips.h
@@ -34,13 +34,16 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Floating point is IEEE compliant */
#define IEEE_FLOAT
-extern int mips_processor_id;
-
/* Some MIPS boards are provided both with and without a floating
point coprocessor; we provide a user settable variable to tell gdb
whether there is one or not. */
extern int mips_fpu;
+/* The name of the usual type of MIPS processor that is in the target
+ system. */
+
+#define DEFAULT_MIPS_TYPE "generic"
+
/* Offset from address of function to start of its code.
Zero on most machines. */
@@ -105,7 +108,7 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *));
/* Number of machine registers */
-#define NUM_REGS 80
+#define NUM_REGS 90
/* Initializer for an array of names of registers.
There should be NUM_REGS strings in this initializer. */
@@ -120,8 +123,9 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *));
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
- "fsr", "fir", "fp", "inx", "rand", "tlblo","ctxt", "tlbhi",\
- "epc", "prid"\
+ "fsr", "fir", "fp", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
}
/* Register numbers of various important registers.
@@ -146,8 +150,9 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *));
#define FCRCS_REGNUM 70 /* FP control/status */
#define FCRIR_REGNUM 71 /* FP implementation/revision */
#define FP_REGNUM 72 /* Pseudo register that contains true address of executing stack frame */
-#define FIRST_EMBED_REGNUM 73 /* First supervisor register for embedded use */
-#define LAST_EMBED_REGNUM 79 /* Last one */
+#define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */
+#define PRID_REGNUM 89 /* Processor ID */
+#define LAST_EMBED_REGNUM 89 /* Last one */
/* Define DO_REGISTERS_INFO() to do machine-specific formatting
of register dumps. */
@@ -156,6 +161,7 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *));
/* Total amount of space needed to store our copies of the machine's
register state, the array `registers'. */
+
#define REGISTER_BYTES (NUM_REGS*MIPS_REGSIZE)
/* Index within `registers' of the first byte of the space for