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authorKung Hsu <kung@cygnus>1994-02-19 00:50:48 +0000
committerKung Hsu <kung@cygnus>1994-02-19 00:50:48 +0000
commit031b390acb7140d5b7be6a7420dbc57fdfb2c72c (patch)
treea02a966b6acfb3ac2d16ba4897524ffbba6a0f56 /gdb/config/mips
parent83eab3d68d30f8c3f6ca6dd124e70863803a14a2 (diff)
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Modified Files:
tm-mips64.h tm-mips.h Change REGISTER_VIRTUAL_TYPE to handle 64 bit register.
Diffstat (limited to 'gdb/config/mips')
-rw-r--r--gdb/config/mips/tm-mips.h4
-rw-r--r--gdb/config/mips/tm-mips64.h5
2 files changed, 8 insertions, 1 deletions
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
index e0d165f..1c0b790 100644
--- a/gdb/config/mips/tm-mips.h
+++ b/gdb/config/mips/tm-mips.h
@@ -178,9 +178,11 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *));
/* Return the GDB type object for the "standard" data type
of data in register N. */
+#ifndef REGISTER_VIRTUAL_TYPE
#define REGISTER_VIRTUAL_TYPE(N) \
(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) \
- ? builtin_type_float : builtin_type_int) \
+ ? builtin_type_float : builtin_type_int)
+#endif
#if HOST_BYTE_ORDER == BIG_ENDIAN
/* All mips targets store doubles in a register pair with the least
diff --git a/gdb/config/mips/tm-mips64.h b/gdb/config/mips/tm-mips64.h
index 255ed94..a520d7f 100644
--- a/gdb/config/mips/tm-mips64.h
+++ b/gdb/config/mips/tm-mips64.h
@@ -23,6 +23,11 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Use eight byte registers. */
#define MIPS_REGSIZE 8
+/* define 8 byte register type */
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) \
+ ? builtin_type_double : builtin_type_long_long) \
+
/* Load double words in CALL_DUMMY. */
#define OP_LDFPR 065 /* ldc1 */
#define OP_LDGPR 067 /* ld */