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author | Stan Shebs <shebs@codesourcery.com> | 1999-04-16 01:35:26 +0000 |
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committer | Stan Shebs <shebs@codesourcery.com> | 1999-04-16 01:35:26 +0000 |
commit | c906108c21474dfb4ed285bcc0ac6fe02cd400cc (patch) | |
tree | a0015aa5cedc19ccbab307251353a41722a3ae13 /gdb/config/m68k/tm-delta68.h | |
parent | cd946cff9ede3f30935803403f06f6ed30cad136 (diff) | |
download | gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.zip gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.tar.gz gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.tar.bz2 |
Initial creation of sourceware repositorygdb-4_18-branchpoint
Diffstat (limited to 'gdb/config/m68k/tm-delta68.h')
-rw-r--r-- | gdb/config/m68k/tm-delta68.h | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/gdb/config/m68k/tm-delta68.h b/gdb/config/m68k/tm-delta68.h new file mode 100644 index 0000000..5965bb5 --- /dev/null +++ b/gdb/config/m68k/tm-delta68.h @@ -0,0 +1,103 @@ +/* Target definitions for delta68. + Copyright 1993, 1994, 1998 Free Software Foundation, Inc. + +This file is part of GDB. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* Define BPT_VECTOR if it is different than the default. + This is the vector number used by traps to indicate a breakpoint. */ + +#define BPT_VECTOR 0x1 + +#define GCC_COMPILED_FLAG_SYMBOL "gcc_compiled%" +#define GCC2_COMPILED_FLAG_SYMBOL "gcc2_compiled%" + +/* Amount PC must be decremented by after a breakpoint. + On the Delta, the kernel decrements it for us. */ + +#define DECR_PC_AFTER_BREAK 0 + +/* Not sure what happens if we try to store this register, but + phdm@info.ucl.ac.be says we need this define. */ + +#define CANNOT_STORE_REGISTER(regno) (regno == FPI_REGNUM) + +/* Extract from an array REGBUF containing the (raw) register state + a function return value of type TYPE, and copy that, in virtual format, + into VALBUF. */ + +/* When it returns a float/double value, use fp0 in sysV68. */ +/* When it returns a pointer value, use a0 in sysV68. */ + +#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ + if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \ + REGISTER_CONVERT_TO_VIRTUAL (FP0_REGNUM, TYPE, \ + ®BUF[REGISTER_BYTE (FP0_REGNUM)], \ + VALBUF); \ + else \ + memcpy ((VALBUF), \ + (char *) ((REGBUF) + \ + (TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 : \ + (TYPE_LENGTH(TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH(TYPE)))), \ + TYPE_LENGTH(TYPE)) + +/* Write into appropriate registers a function return value + of type TYPE, given in virtual format. */ + +/* When it returns a float/double value, use fp0 in sysV68. */ +/* When it returns a pointer value, use a0 in sysV68. */ + +#define STORE_RETURN_VALUE(TYPE,VALBUF) \ + if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \ + { \ + char raw_buf[REGISTER_RAW_SIZE (FP0_REGNUM)]; \ + REGISTER_CONVERT_TO_RAW (TYPE, FP0_REGNUM, VALBUF, raw_buf); \ + write_register_bytes (REGISTER_BYTE (FP0_REGNUM), \ + raw_buf, REGISTER_RAW_SIZE (FP0_REGNUM)); \ + } \ + else \ + write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 : 0), \ + VALBUF, TYPE_LENGTH (TYPE)) + +/* Return number of args passed to a frame. + Can return -1, meaning no way to tell. */ + +#define FRAME_NUM_ARGS(val, fi) \ +{ register CORE_ADDR pc = FRAME_SAVED_PC (fi); \ + register int insn = 0177777 & read_memory_integer (pc, 2); \ + val = 0; \ + if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */ \ + val = read_memory_integer (pc + 2, 2); \ + else if ((insn & 0170777) == 0050217 /* addql #N, sp */ \ + || (insn & 0170777) == 0050117) /* addqw */ \ + { val = (insn >> 9) & 7; if (val == 0) val = 8; } \ + else if (insn == 0157774) /* addal #WW, sp */ \ + val = read_memory_integer (pc + 2, 4); \ + val >>= 2; } + +/* On M68040 versions of sysV68 R3V7.1, ptrace(PT_WRITE_I) does not clear + the processor's instruction cache as it should. */ +#define CLEAR_INSN_CACHE() clear_insn_cache() + +#include "m68k/tm-m68k.h" + +/* Extract from an array REGBUF containing the (raw) register state + the address in which a function should return its structure value, + as a CORE_ADDR (or an expression that can be used as one). */ + +#undef EXTRACT_STRUCT_VALUE_ADDRESS +#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF)\ + (*(CORE_ADDR *)((char*)(REGBUF) + 8 * 4)) |