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authorSteve Chamberlain <sac@cygnus>1993-12-12 00:03:31 +0000
committerSteve Chamberlain <sac@cygnus>1993-12-12 00:03:31 +0000
commit34f07efe01f9a598ec3fb1f521bb7347b44349c8 (patch)
treeb5b9558993016d10c2ace40bd79758be76c7c173 /gdb/config/h8300
parent08c0d7b84f411aed680b0777b43266171f11c552 (diff)
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* config/h8300/tm-h8300.h (BREAKPOINT): Insn changed to sleep.
(DECP_PC_AFTER_BREAK): Now is 0.
Diffstat (limited to 'gdb/config/h8300')
-rw-r--r--gdb/config/h8300/tm-h8300.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/gdb/config/h8300/tm-h8300.h b/gdb/config/h8300/tm-h8300.h
index c80df2f..3356008 100644
--- a/gdb/config/h8300/tm-h8300.h
+++ b/gdb/config/h8300/tm-h8300.h
@@ -77,12 +77,13 @@ extern CORE_ADDR h8300_skip_prologue ();
#define INNER_THAN <
-#define BREAKPOINT {0x7A, 0xFF}
+/*#define BREAKPOINT {0x7A, 0xFF}*/
+#define BREAKPOINT {0x01, 0x80} /* Sleep */
/* If your kernel resets the pc after the trap happens you may need to
- define this before including this file. */
+ define this before including this file. */
-#define DECR_PC_AFTER_BREAK 2
+#define DECR_PC_AFTER_BREAK 0
/* Nonzero if instruction at PC is a return instruction. */
/* Allow any of the return instructions, including a trapv and a return
@@ -254,4 +255,4 @@ typedef unsigned short INSN_WORD;
#define GDB_TARGET_IS_H8300
#define NUM_REALREGS 10
-#define NOP {0,0}
+#define NOP { 0x01, 0x80} /* A sleep insn */