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authorMike Frysinger <vapier@gentoo.org>2013-05-06 18:03:33 +0000
committerMike Frysinger <vapier@gentoo.org>2013-05-06 18:03:33 +0000
commit5f8e0b8f4ff5dde6acc8e9eaef97ebd3a40354fe (patch)
tree0e04bbec30563dc287010166b65ac809d1125851 /gdb/common
parentea52d8933d3a7838350aced02a031b64c8ca0168 (diff)
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gdb: btrace: fix indentation style
Most of this func had the incorrect indentation level (starting with 4 spaces instead of 2).
Diffstat (limited to 'gdb/common')
-rw-r--r--gdb/common/linux-btrace.c68
1 files changed, 34 insertions, 34 deletions
diff --git a/gdb/common/linux-btrace.c b/gdb/common/linux-btrace.c
index ed0cb24..d3c8705 100644
--- a/gdb/common/linux-btrace.c
+++ b/gdb/common/linux-btrace.c
@@ -340,40 +340,40 @@ static int
intel_supports_btrace (void)
{
#if defined __i386__ || defined __x86_64__
- unsigned int cpuid, model, family;
-
- __asm__ __volatile__ ("movl $1, %%eax;"
- "cpuid;"
- : "=a" (cpuid)
- :: "%ebx", "%ecx", "%edx");
-
- family = (cpuid >> 8) & 0xf;
- model = (cpuid >> 4) & 0xf;
-
- switch (family)
- {
- case 0x6:
- model += (cpuid >> 12) & 0xf0;
-
- switch (model)
- {
- case 0x1a: /* Nehalem */
- case 0x1f:
- case 0x1e:
- case 0x2e:
- case 0x25: /* Westmere */
- case 0x2c:
- case 0x2f:
- case 0x2a: /* Sandy Bridge */
- case 0x2d:
- case 0x3a: /* Ivy Bridge */
-
- /* AAJ122: LBR, BTM, or BTS records may have incorrect branch
- "from" information afer an EIST transition, T-states, C1E, or
- Adaptive Thermal Throttling. */
- return 0;
- }
- }
+ unsigned int cpuid, model, family;
+
+ __asm__ __volatile__ ("movl $1, %%eax;"
+ "cpuid;"
+ : "=a" (cpuid)
+ :: "%ebx", "%ecx", "%edx");
+
+ family = (cpuid >> 8) & 0xf;
+ model = (cpuid >> 4) & 0xf;
+
+ switch (family)
+ {
+ case 0x6:
+ model += (cpuid >> 12) & 0xf0;
+
+ switch (model)
+ {
+ case 0x1a: /* Nehalem */
+ case 0x1f:
+ case 0x1e:
+ case 0x2e:
+ case 0x25: /* Westmere */
+ case 0x2c:
+ case 0x2f:
+ case 0x2a: /* Sandy Bridge */
+ case 0x2d:
+ case 0x3a: /* Ivy Bridge */
+
+ /* AAJ122: LBR, BTM, or BTS records may have incorrect branch
+ "from" information afer an EIST transition, T-states, C1E, or
+ Adaptive Thermal Throttling. */
+ return 0;
+ }
+ }
return 1;