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authorLuis Machado <luis.machado@linaro.org>2021-10-04 13:56:43 -0300
committerLuis Machado <luis.machado@linaro.org>2021-10-11 16:03:52 -0300
commitecbf5d4f9b716c50908f62cbb9917ed42d45a254 (patch)
tree324ced2777be84902c17eed80ae86802d15fbb88 /gdb/arm-tdep.h
parentdc22c61a1600639046407fb171613a3192fc0608 (diff)
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[ARM] Refactor pseudo register numbering
The pseudo register handling for ARM uses some hardcoded constants to determine types and names. In preparation to the upcoming MVE support patch (that will add another pseudo register), this patch refactors and reorganizes things in order to simplify handling of future pseudo registers. We keep track of the first pseudo register number in a group and the number of pseudo registers in that group. Right now we only have the S and Q pseudo registers.
Diffstat (limited to 'gdb/arm-tdep.h')
-rw-r--r--gdb/arm-tdep.h15
1 files changed, 11 insertions, 4 deletions
diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
index 969e121..63b8952 100644
--- a/gdb/arm-tdep.h
+++ b/gdb/arm-tdep.h
@@ -100,11 +100,18 @@ struct gdbarch_tdep
/* The number of VFP registers reported by the target. It is zero
if VFP registers are not supported. */
int vfp_register_count;
- bool have_vfp_pseudos; /* Are we synthesizing the single precision
+ bool have_s_pseudos; /* Are we synthesizing the single precision
VFP registers? */
- bool have_neon_pseudos; /* Are we synthesizing the quad precision
- NEON registers? Requires
- have_vfp_pseudos. */
+ int s_pseudo_base; /* Register number for the first S pseudo
+ register. */
+ int s_pseudo_count; /* Number of S pseudo registers. */
+ bool have_q_pseudos; /* Are we synthesizing the quad precision
+ Q (NEON or MVE) registers? Requires
+ have_s_pseudos. */
+ int q_pseudo_base; /* Register number for the first quad
+ precision pseudo register. */
+ int q_pseudo_count; /* Number of quad precision pseudo
+ registers. */
bool have_neon; /* Do we have a NEON unit? */
bool is_m; /* Does the target follow the "M" profile. */