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| author | Yao Qi <yao@codesourcery.com> | 2011-02-18 05:01:54 +0000 |
|---|---|---|
| committer | Yao Qi <yao@codesourcery.com> | 2011-02-18 05:01:54 +0000 |
| commit | b434a28f71a481451dbd0719c6ca3fdf072d9407 (patch) | |
| tree | 277a9f3183c6146713b1d9074f981af26bd0c13c /gdb/arm-tdep.c | |
| parent | 0bbd5bccf3e652fe5649c7cdb4548f5656e59dac (diff) | |
| download | gdb-b434a28f71a481451dbd0719c6ca3fdf072d9407.zip gdb-b434a28f71a481451dbd0719c6ca3fdf072d9407.tar.gz gdb-b434a28f71a481451dbd0719c6ca3fdf072d9407.tar.bz2 | |
2011-02-18 Yao Qi <yao@codesourcery.com>
* gdb/arm-tdep.c (arm_displaced_step_copy_insn): Move code to ...
(arm_process_displaced_insn): .. here. Remove parameter INSN.
(thumb_process_displaced_insn): New.
* gdb/arm-linux-tdep.c (arm_linux_displaced_step_copy_insn): Update
call to arm_process_displaced_insn.
* gdb/arm-tdep.h : Update declaration of arm_process_displaced_insn.
Diffstat (limited to 'gdb/arm-tdep.c')
| -rw-r--r-- | gdb/arm-tdep.c | 37 |
1 files changed, 22 insertions, 15 deletions
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 96061e3..16334bf 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -6833,16 +6833,22 @@ decode_svc_copro (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to, return copy_undef (gdbarch, insn, dsc); /* Possibly unreachable. */ } +static void +thumb_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from, + CORE_ADDR to, struct regcache *regs, + struct displaced_step_closure *dsc) +{ + error (_("Displaced stepping is only supported in ARM mode")); +} + void -arm_process_displaced_insn (struct gdbarch *gdbarch, uint32_t insn, - CORE_ADDR from, CORE_ADDR to, - struct regcache *regs, +arm_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from, + CORE_ADDR to, struct regcache *regs, struct displaced_step_closure *dsc) { int err = 0; - - if (!displaced_in_arm_mode (regs)) - error (_("Displaced stepping is only supported in ARM mode")); + enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch); + uint32_t insn; /* Most displaced instructions use a 1-instruction scratch space, so set this here and override below if/when necessary. */ @@ -6852,6 +6858,15 @@ arm_process_displaced_insn (struct gdbarch *gdbarch, uint32_t insn, dsc->cleanup = NULL; dsc->wrote_to_pc = 0; + if (!displaced_in_arm_mode (regs)) + return thumb_process_displaced_insn (gdbarch, from, to, regs, dsc); + + insn = read_memory_unsigned_integer (from, 4, byte_order_for_code); + if (debug_displaced) + fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx " + "at %.8lx\n", (unsigned long) insn, + (unsigned long) from); + if ((insn & 0xf0000000) == 0xf0000000) err = decode_unconditional (gdbarch, insn, regs, dsc); else switch (((insn & 0x10) >> 4) | ((insn & 0xe000000) >> 24)) @@ -6922,15 +6937,7 @@ arm_displaced_step_copy_insn (struct gdbarch *gdbarch, { struct displaced_step_closure *dsc = xmalloc (sizeof (struct displaced_step_closure)); - enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch); - uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order_for_code); - - if (debug_displaced) - fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx " - "at %.8lx\n", (unsigned long) insn, - (unsigned long) from); - - arm_process_displaced_insn (gdbarch, insn, from, to, regs, dsc); + arm_process_displaced_insn (gdbarch, from, to, regs, dsc); arm_displaced_init_closure (gdbarch, from, to, dsc); return dsc; |