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authorUlrich Weigand <uweigand@de.ibm.com>2007-04-14 18:10:54 +0000
committerUlrich Weigand <uweigand@de.ibm.com>2007-04-14 18:10:54 +0000
commite0cd558aaae1d2c457f3963c58e78ec419f0712a (patch)
treee26699b93e249067be360336f3711f2fc6e7ead7 /gdb/arm-tdep.c
parent06a862851c31bb286d5f8177b9a5db6a65282fb8 (diff)
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* gdbarch.sh (software_single_step): Remove "insert_breakpoints_p" and
"sig" arguments, add "regcache" argument. * gdbarch.c, gdbarch.h: Regenerate. * infrun.c (resume): Update SOFTWARE_SINGLE_STEP call arguments. (handle_inferior_event): Call remove_single_step_breakpoints directly instead of calling SOFTWARE_SINGLE_STEP to remove breakpoints. * alpha-tdep.c (alpha_software_single_step): Update argument list. Remove handling of !insert_breakpoints_p case. * arm-tdep.c (arm_software_single_step): Likewise. * cris-tdep.c (cris_software_single_step): Likewise. * mips-tdep.c (mips_software_single_step): Likewise. * rs6000-tdep.c (rs6000_software_single_step): Likewise. * sparc-tdep.c (sparc_software_single_step): Likewise. * spu-tdep.c (spu_software_single_step): Likewise. * alpha-tdep.h (alpha_software_single_step): Update prototype. * mips-tdep.h (mips_software_single_step): Likewise. * rs6000-tdep.h (rs6000_software_single_step): Likewise. * sparc-tdep.h (sparc_software_single_step): Likewise.
Diffstat (limited to 'gdb/arm-tdep.c')
-rw-r--r--gdb/arm-tdep.c17
1 files changed, 4 insertions, 13 deletions
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index fda2669..8a3a1f9 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -1902,26 +1902,17 @@ arm_get_next_pc (CORE_ADDR pc)
/* single_step() is called just before we want to resume the inferior,
if we want to single-step it but there is no hardware or kernel
single-step support. We find the target of the coming instruction
- and breakpoint it.
-
- single_step() is also called just after the inferior stops. If we
- had set up a simulated single-step, we undo our damage. */
+ and breakpoint it. */
static int
-arm_software_single_step (enum target_signal sig, int insert_bpt)
+arm_software_single_step (struct regcache *regcache)
{
/* NOTE: This may insert the wrong breakpoint instruction when
single-stepping over a mode-changing instruction, if the
CPSR heuristics are used. */
- if (insert_bpt)
- {
- CORE_ADDR next_pc = arm_get_next_pc (read_register (ARM_PC_REGNUM));
-
- insert_single_step_breakpoint (next_pc);
- }
- else
- remove_single_step_breakpoints ();
+ CORE_ADDR next_pc = arm_get_next_pc (read_register (ARM_PC_REGNUM));
+ insert_single_step_breakpoint (next_pc);
return 1;
}