gdb: ARM: Adds support for recording system call instructions

gdb/ChangeLog:

2014-01-15  Omair Javaid  <omair.javaid@linaro.org>

	* arm-linux-tdep.c: Include "record-full.h" and "linux-record.h".
	(struct arm_linux_record_tdep): Declare.
	(arm_canonicalize_syscall): New function.
	(arm_all_but_pc_registers_record): New function.
	(arm_linux_syscall_record): New function.
	(arm_linux_init_abi): Add syscall recording constructs.
	* arm-tdep.c (thumb_record_ldm_stm_swi): Update thumb syscall
	decoding.  (arm_record_coproc_data_proc): Update arm syscall
	decoding.
	* arm-tdep.h (struct gdbarch_tdep) <arm_swi_record>: Remove.
	<arm_syscall_record>: New field.
	* configure.tgt (arm*-*-linux*): Add linux-record.o to
	gdb_target_obs.

1 files changed, 31 insertions, 19 deletions

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 009536a..cae4600 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -11917,27 +11917,38 @@ arm_record_coproc_data_proc (insn_decode_record *arm_insn_r)
   struct gdbarch_tdep *tdep = gdbarch_tdep (arm_insn_r->gdbarch);
   struct regcache *reg_cache = arm_insn_r->regcache;
   uint32_t ret = 0; /* function return value: -1:record failure ;  0:success  */
-
-  /* Handle SWI insn; system call would be handled over here.  */
+  ULONGEST u_regval = 0;
 
   arm_insn_r->opcode = bits (arm_insn_r->arm_insn, 24, 27);
+
+  /* Handle arm SWI/SVC system call instructions.  */
   if (15 == arm_insn_r->opcode)
-  {
-    /* Handle arm syscall insn.  */
-    if (tdep->arm_swi_record != NULL)
-      {
-        ret = tdep->arm_swi_record(reg_cache);
-      }
-    else
-      {
-        printf_unfiltered (_("no syscall record support\n"));
-        ret = -1;
-      }
-  }
+    {
+      if (tdep->arm_syscall_record != NULL)
+        {
+          ULONGEST svc_operand, svc_number;
+
+          svc_operand = (0x00ffffff & arm_insn_r->arm_insn);
+
+          if (svc_operand)  /* OABI.  */
+            svc_number = svc_operand - 0x900000;
+          else /* EABI.  */
+            regcache_raw_read_unsigned (reg_cache, 7, &svc_number);
+
+          ret = tdep->arm_syscall_record (reg_cache, svc_number);
+        }
+      else
+        {
+          printf_unfiltered (_("no syscall record support\n"));
+          ret = -1;
+        }
+    }
+  else
+    {
+      arm_record_unsupported_insn (arm_insn_r);
+      ret = -1;
+    }
 
-  printf_unfiltered (_("Process record does not support instruction "
-                        "0x%0x at address %s.\n"),arm_insn_r->arm_insn,
-                        paddress (arm_insn_r->gdbarch, arm_insn_r->this_addr));
   return ret;
 }
 
@@ -12328,9 +12339,10 @@ thumb_record_ldm_stm_swi (insn_decode_record *thumb_insn_r)
   else if (0x1F == opcode1)
     {
         /* Handle arm syscall insn.  */
-        if (tdep->arm_swi_record != NULL)
+        if (tdep->arm_syscall_record != NULL)
           {
-            ret = tdep->arm_swi_record(reg_cache);
+            regcache_raw_read_unsigned (reg_cache, 7, &u_regval);
+            ret = tdep->arm_syscall_record (reg_cache, u_regval);
           }
         else
           {