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authorJohn Baldwin <jhb@FreeBSD.org>2017-10-11 11:16:34 -0700
committerJohn Baldwin <jhb@FreeBSD.org>2017-10-11 11:16:34 -0700
commit7176dfd28d1a2a74e6d8dd698aeb857eb6edfb98 (patch)
treef719df7c741cb3208388b2a94a665c5c5f691fb3 /gdb/arm-fbsd-tdep.h
parent39865a7f420ab4ca4dec6ed27339618a5d5dc366 (diff)
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Add FreeBSD/arm architecture.
Support for collecting and supplying general purpose and floating point registers is provided along with signal frame unwinding. While FreeBSD/arm kernels do populate NT_FPREGSET notes, they are always zero-filled, so this implementation ignores them. Recent FreeBSD/arm kernels generate NT_ARM_VFP notes which are used to supply floating-point registers. As with Linux, the AT_HWCAP feature flags are used to determine the correct target description. gdb/ChangeLog: * Makefile.in (ALL_TARGET_OBS): Add arm-fbsd-tdep.o. (ALLDEPFILES): Add arm-fbsd-tdep.c. * NEWS: Mention new FreeBSD/arm target. * configure.tgt: Add arm*-*-freebsd*. * arm-fbsd-tdep.c: New file. * arm-fbsd-tdep.h: New file.
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diff --git a/gdb/arm-fbsd-tdep.h b/gdb/arm-fbsd-tdep.h
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+/* FreeBSD/arm target support, prototypes.
+
+ Copyright (C) 2017 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "regset.h"
+
+/* The general-purpose regset consists of 13 R registers, plus SP, LR,
+ PC, and CPSR registers. */
+#define ARM_FBSD_SIZEOF_GREGSET (17 * 4)
+
+/* The VFP regset consists of 32 D registers plus FPSCR, and the whole
+ structure is padded to 64-bit alignment. */
+#define ARM_FBSD_SIZEOF_VFPREGSET (33 * 8)
+
+extern const struct regset arm_fbsd_gregset;
+extern const struct regset arm_fbsd_vfpregset;
+
+/* Flags passed in AT_HWCAP. */
+#define HWCAP_VFP 0x00000040
+#define HWCAP_NEON 0x00001000
+#define HWCAP_VFPv3 0x00002000
+#define HWCAP_VFPD32 0x00080000
+
+extern const struct target_desc *
+arm_fbsd_read_description_auxv (struct target_ops *target);