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authorPierre Langlois <pierre.langlois@arm.com>2015-09-21 15:01:04 +0100
committerYao Qi <yao.qi@linaro.org>2015-09-21 15:01:04 +0100
commit6ec5f4be052e594dc90b6677fec1c1e7727d9651 (patch)
treea3cd573fae1dca52781754dedb6c281563509679 /gdb/arch
parent787749ead66eee8c20754c160bd79404b2109553 (diff)
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Make aarch64_decode_adrp handle both ADR and ADRP instructions
We will need to decode both ADR and ADRP instructions in GDBserver. This patch makes common code handle both cases, even if GDB only needs to decode the ADRP instruction. gdb/ChangeLog: * aarch64-tdep.c (aarch64_analyze_prologue): New is_adrp variable. Call aarch64_decode_adr instead of aarch64_decode_adrp. * arch/aarch64-insn.h (aarch64_decode_adrp): Delete. (aarch64_decode_adr): New function declaration. * arch/aarch64-insn.c (aarch64_decode_adrp): Delete. (aarch64_decode_adr): New function, factored out from aarch64_decode_adrp to decode both adr and adrp instructions.
Diffstat (limited to 'gdb/arch')
-rw-r--r--gdb/arch/aarch64-insn.c29
-rw-r--r--gdb/arch/aarch64-insn.h3
2 files changed, 26 insertions, 6 deletions
diff --git a/gdb/arch/aarch64-insn.c b/gdb/arch/aarch64-insn.c
index 3a289a2..13d0013 100644
--- a/gdb/arch/aarch64-insn.c
+++ b/gdb/arch/aarch64-insn.c
@@ -55,25 +55,44 @@ decode_masked_match (uint32_t insn, uint32_t mask, uint32_t pattern)
return (insn & mask) == pattern;
}
-/* Decode an opcode if it represents an ADRP instruction.
+/* Decode an opcode if it represents an ADR or ADRP instruction.
ADDR specifies the address of the opcode.
INSN specifies the opcode to test.
+ IS_ADRP receives the 'op' field from the decoded instruction.
RD receives the 'rd' field from the decoded instruction.
+ OFFSET receives the 'immhi:immlo' field from the decoded instruction.
Return 1 if the opcodes matches and is decoded, otherwise 0. */
int
-aarch64_decode_adrp (CORE_ADDR addr, uint32_t insn, unsigned *rd)
+aarch64_decode_adr (CORE_ADDR addr, uint32_t insn, int *is_adrp,
+ unsigned *rd, int32_t *offset)
{
- if (decode_masked_match (insn, 0x9f000000, 0x90000000))
+ /* adr 0ii1 0000 iiii iiii iiii iiii iiir rrrr */
+ /* adrp 1ii1 0000 iiii iiii iiii iiii iiir rrrr */
+ if (decode_masked_match (insn, 0x1f000000, 0x10000000))
{
+ uint32_t immlo = (insn >> 29) & 0x3;
+ int32_t immhi = extract_signed_bitfield (insn, 19, 5) << 2;
+
+ *is_adrp = (insn >> 31) & 0x1;
*rd = (insn >> 0) & 0x1f;
+ if (*is_adrp)
+ {
+ /* The ADRP instruction has an offset with a -/+ 4GB range,
+ encoded as (immhi:immlo * 4096). */
+ *offset = (immhi | immlo) * 4096;
+ }
+ else
+ *offset = (immhi | immlo);
+
if (aarch64_debug)
{
- debug_printf ("decode: 0x%s 0x%x adrp x%u, #?\n",
- core_addr_to_string_nz (addr), insn, *rd);
+ debug_printf ("decode: 0x%s 0x%x %s x%u, #?\n",
+ core_addr_to_string_nz (addr), insn,
+ *is_adrp ? "adrp" : "adr", *rd);
}
return 1;
}
diff --git a/gdb/arch/aarch64-insn.h b/gdb/arch/aarch64-insn.h
index 7775a34..2facb44 100644
--- a/gdb/arch/aarch64-insn.h
+++ b/gdb/arch/aarch64-insn.h
@@ -21,7 +21,8 @@
extern int aarch64_debug;
-int aarch64_decode_adrp (CORE_ADDR addr, uint32_t insn, unsigned *rd);
+int aarch64_decode_adr (CORE_ADDR addr, uint32_t insn, int *is_adrp,
+ unsigned *rd, int32_t *offset);
int aarch64_decode_b (CORE_ADDR addr, uint32_t insn, int *is_bl,
int32_t *offset);