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author | Luis Machado <luis.machado@linaro.org> | 2021-07-27 11:36:33 -0300 |
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committer | Luis Machado <luis.machado@linaro.org> | 2021-10-11 16:03:44 -0300 |
commit | 4d224f4a589689449677e9c500cf12bee8283a3b (patch) | |
tree | 6c9b9cfef45c24e58af8721a7f966dd2512a5520 /gdb/arch | |
parent | c8ed8c8ac380813b3a5d47131ccad1f79305c16b (diff) | |
download | gdb-4d224f4a589689449677e9c500cf12bee8283a3b.zip gdb-4d224f4a589689449677e9c500cf12bee8283a3b.tar.gz gdb-4d224f4a589689449677e9c500cf12bee8283a3b.tar.bz2 |
[ARM] Refactor some constants
In preparation for the MVE extension patch, this one refactors some of
the register-related constants we have for ARM.
Basically I'm separating counting constants from numbering constants.
For example, ARM_A1_REGNUM is a numbering constant, whereas ARM_NUM_ARG_REGS
is a counting constant.
Diffstat (limited to 'gdb/arch')
-rw-r--r-- | gdb/arch/arm.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/gdb/arch/arm.h b/gdb/arch/arm.h index fa589fd..f6a155d 100644 --- a/gdb/arch/arm.h +++ b/gdb/arch/arm.h @@ -50,17 +50,23 @@ enum gdb_regnum { ARM_D31_REGNUM = ARM_D0_REGNUM + 31, ARM_FPSCR_REGNUM, - ARM_NUM_REGS, - /* Other useful registers. */ ARM_FP_REGNUM = 11, /* Frame register in ARM code, if used. */ THUMB_FP_REGNUM = 7, /* Frame register in Thumb code, if used. */ - ARM_NUM_ARG_REGS = 4, ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM, - ARM_NUM_FP_ARG_REGS = 4, ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM }; +/* Register count constants. */ +enum arm_register_counts { + /* Number of argument registers. */ + ARM_NUM_ARG_REGS = 4, + /* Number of floating point argument registers. */ + ARM_NUM_FP_ARG_REGS = 4, + /* Number of registers (old, defined as ARM_FPSCR_REGNUM + 1. */ + ARM_NUM_REGS = ARM_FPSCR_REGNUM + 1 +}; + /* Enum describing the different kinds of breakpoints. */ enum arm_breakpoint_kinds { |