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author | Alexandre Oliva <oliva@adacore.com> | 2020-03-04 17:28:46 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2020-03-04 17:28:46 +0000 |
commit | 749479c8d3b63c9075d2fabf4b87b1f7109608b6 (patch) | |
tree | ea0bf41a6d7fb0dd11a33e930893a96adb2a9f38 /gdb/amd64-windows-nat.c | |
parent | 440cf44eb0f70830b8d8ac35289f84129c7a35c1 (diff) | |
download | gdb-749479c8d3b63c9075d2fabf4b87b1f7109608b6.zip gdb-749479c8d3b63c9075d2fabf4b87b1f7109608b6.tar.gz gdb-749479c8d3b63c9075d2fabf4b87b1f7109608b6.tar.bz2 |
Generate a warning in the ARM assembler if a PC-relative thumb load instruction is detected in a section with insufficient alignment.
* config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
detected in a section which does not have at least 4 byte
alignment.
* testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
* testsuite/gas/arm/ldr-t.s: Likewise.
* testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
* testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
disassembly, ignoring any NOPs that may have been inserted because
of section alignment.
* testsuite/gas/arm/ldr-t.d: Likewise.
Diffstat (limited to 'gdb/amd64-windows-nat.c')
0 files changed, 0 insertions, 0 deletions