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| author | Walfred Tedeschi <walfred.tedeschi@intel.com> | 2013-11-20 13:02:37 +0100 |
|---|---|---|
| committer | Walfred Tedeschi <walfred.tedeschi@intel.com> | 2013-11-20 14:42:51 +0100 |
| commit | e43e105e0d3a6cf324b19adc10d4952b553f43ee (patch) | |
| tree | 0ab371baffaaf9fe978b4b032b55a1e9b8989518 /gdb/amd64-tdep.h | |
| parent | 1dbcd68cf12168c359df2da36b5b612100310a30 (diff) | |
| download | gdb-e43e105e0d3a6cf324b19adc10d4952b553f43ee.zip gdb-e43e105e0d3a6cf324b19adc10d4952b553f43ee.tar.gz gdb-e43e105e0d3a6cf324b19adc10d4952b553f43ee.tar.bz2 | |
MPX for amd64
2013-06-24 Walfred Tedeschi <walfred.tedeschi@intel.com>
* amd64-linux-nat.c (amd64_linux_gregset32_reg_offset):
Add MPX registers.
(amd64_linux_read_description): Add initialization for MPX and
AVX independently.
* amd64-linux-tdep.c: Includes features/i386/amd64-mpx-linux.c.
(amd64_linux_gregset_reg_offset): Add MPX registers.
(amd64_linux_core_read_description): Add initialization for MPX
registers.
(_initialize_amd64_linux_tdep): Initialize MPX targets.
* amd64-linux-tdep.h (AMD64_LINUX_RAX_REGNUM): Set it to the last
register on the list.
(tdesc_amd64_mpx_linux) Add new target for MPX.
* amd64-tdep.c: Includes features/i386/amd64-mpx.c.
(amd64_mpx_names): MPX register names.
(amd64_init_abi): Add MPX register while initializing the ABI.
(_initialize_amd64_tdep): Initialize MPX targets.
* amd64-tdep.h (amd64_regnum): Add MPX registers.
(AMD64_NUM_REGS): Set number of registers taking MPX into account.
Change-Id: I4a785c181e2fb45e4086650b2f87426caeb2f800
Signed-off-by: Walfred Tedeschi <walfred.tedeschi@intel.com>
Conflicts:
gdb/ChangeLog
Diffstat (limited to 'gdb/amd64-tdep.h')
| -rw-r--r-- | gdb/amd64-tdep.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/gdb/amd64-tdep.h b/gdb/amd64-tdep.h index 265e535..ff58c35 100644 --- a/gdb/amd64-tdep.h +++ b/gdb/amd64-tdep.h @@ -64,13 +64,17 @@ enum amd64_regnum AMD64_XMM1_REGNUM, /* %xmm1 */ AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16, AMD64_YMM0H_REGNUM, /* %ymm0h */ - AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15 + AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15, + AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1, + AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3, + AMD64_BNDCFGU_REGNUM, + AMD64_BNDSTATUS_REGNUM }; /* Number of general purpose registers. */ #define AMD64_NUM_GREGS 24 -#define AMD64_NUM_REGS (AMD64_YMM15H_REGNUM + 1) +#define AMD64_NUM_REGS (AMD64_BNDSTATUS_REGNUM + 1) extern struct displaced_step_closure *amd64_displaced_step_copy_insn (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to, |