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authorVictor Collod <vcollod@nvidia.com>2020-06-23 18:28:56 -0700
committerSimon Marchi <simon.marchi@polymtl.ca>2020-08-06 11:04:53 -0400
commited908db649cd48452fa4c1476a6be437ce9a0126 (patch)
tree45ea2f63568fe7f4183274fb0f098a1a28739269 /gdb/amd64-tdep.c
parent3ee9565c95f49b6f9e80641f6fda51adffc3af1e (diff)
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amd64_analyze_prologue: fix incorrect comment
The width of the instruction didn't match the size of its operands. 2020-06-23 Victor Collod <vcollod@nvidia.com> * amd64-tdep.c (amd64_analyze_prologue): Fix incorrect comment. Change-Id: I104ebfe0b3c24bd6a8d0f0c5a791b9676a930a54
Diffstat (limited to 'gdb/amd64-tdep.c')
-rw-r--r--gdb/amd64-tdep.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 0ce9fbc..768fe63 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -2433,7 +2433,7 @@ amd64_analyze_prologue (struct gdbarch *gdbarch,
return pc + 4;
}
- /* For X32, also check for `movq %esp, %ebp'. */
+ /* For X32, also check for `movl %esp, %ebp'. */
if (gdbarch_ptr_bit (gdbarch) == 32)
{
if (memcmp (buf, mov_esp_ebp_1, 2) == 0