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author | H.J. Lu <hjl.tools@gmail.com> | 2010-04-01 20:02:10 +0000 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2010-04-01 20:02:10 +0000 |
commit | fe01d6681b7451f8ae035fc4d0e69e75fb14fdf7 (patch) | |
tree | 53ce09d70bc54564a91de4d7bc6cc6bb3560f53d /gdb/amd64-tdep.c | |
parent | bdabb07895854f0a2109bbbe9755b8ea6d6a9611 (diff) | |
download | gdb-fe01d6681b7451f8ae035fc4d0e69e75fb14fdf7.zip gdb-fe01d6681b7451f8ae035fc4d0e69e75fb14fdf7.tar.gz gdb-fe01d6681b7451f8ae035fc4d0e69e75fb14fdf7.tar.bz2 |
Support "ah", "bh", "ch", "dh" on amd64.
gdb/
2010-04-01 H.J. Lu <hongjiu.lu@intel.com>
* amd64-tdep.c (amd64_byte_names): Add "ah", "bh", "ch", "dh".
(AMD64_NUM_LOWER_BYTE_REGS): New.
(amd64_pseudo_register_read): Handle "ah", "bh", "ch", "dh".
(amd64_pseudo_register_write): Likewise.
(amd64_init_abi): Set num_byte_regs to 20.
gdb/testsuite/
2010-04-01 H.J. Lu <hongjiu.lu@intel.com>
* gdb.arch/amd64-byte.exp: Check "ah", "bh", "ch", "dh".
Diffstat (limited to 'gdb/amd64-tdep.c')
-rw-r--r-- | gdb/amd64-tdep.c | 48 |
1 files changed, 38 insertions, 10 deletions
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c index e5cfa71..acab4ac 100644 --- a/gdb/amd64-tdep.c +++ b/gdb/amd64-tdep.c @@ -215,9 +215,13 @@ amd64_arch_reg_to_regnum (int reg) static const char *amd64_byte_names[] = { "al", "bl", "cl", "dl", "sil", "dil", "bpl", "spl", - "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l" + "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l", + "ah", "bh", "ch", "dh" }; +/* Number of lower byte registers. */ +#define AMD64_NUM_LOWER_BYTE_REGS 16 + /* Register names for word pseudo-registers. */ static const char *amd64_word_names[] = @@ -263,8 +267,18 @@ amd64_pseudo_register_read (struct gdbarch *gdbarch, int gpnum = regnum - tdep->al_regnum; /* Extract (always little endian). */ - regcache_raw_read (regcache, gpnum, raw_buf); - memcpy (buf, raw_buf, 1); + if (gpnum >= AMD64_NUM_LOWER_BYTE_REGS) + { + /* Special handling for AH, BH, CH, DH. */ + regcache_raw_read (regcache, + gpnum - AMD64_NUM_LOWER_BYTE_REGS, raw_buf); + memcpy (buf, raw_buf + 1, 1); + } + else + { + regcache_raw_read (regcache, gpnum, raw_buf); + memcpy (buf, raw_buf, 1); + } } else if (i386_dword_regnum_p (gdbarch, regnum)) { @@ -289,12 +303,26 @@ amd64_pseudo_register_write (struct gdbarch *gdbarch, { int gpnum = regnum - tdep->al_regnum; - /* Read ... */ - regcache_raw_read (regcache, gpnum, raw_buf); - /* ... Modify ... (always little endian). */ - memcpy (raw_buf, buf, 1); - /* ... Write. */ - regcache_raw_write (regcache, gpnum, raw_buf); + if (gpnum >= AMD64_NUM_LOWER_BYTE_REGS) + { + /* Read ... AH, BH, CH, DH. */ + regcache_raw_read (regcache, + gpnum - AMD64_NUM_LOWER_BYTE_REGS, raw_buf); + /* ... Modify ... (always little endian). */ + memcpy (raw_buf + 1, buf, 1); + /* ... Write. */ + regcache_raw_write (regcache, + gpnum - AMD64_NUM_LOWER_BYTE_REGS, raw_buf); + } + else + { + /* Read ... */ + regcache_raw_read (regcache, gpnum, raw_buf); + /* ... Modify ... (always little endian). */ + memcpy (raw_buf, buf, 1); + /* ... Write. */ + regcache_raw_write (regcache, gpnum, raw_buf); + } } else if (i386_dword_regnum_p (gdbarch, regnum)) { @@ -2228,7 +2256,7 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) tdep->num_core_regs = AMD64_NUM_GREGS + I387_NUM_REGS; tdep->register_names = amd64_register_names; - tdep->num_byte_regs = 16; + tdep->num_byte_regs = 20; tdep->num_word_regs = 16; tdep->num_dword_regs = 16; /* Avoid wiring in the MMX registers for now. */ |