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author | Simon Marchi <simon.marchi@polymtl.ca> | 2017-05-02 13:30:07 -0400 |
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committer | Simon Marchi <simon.marchi@ericsson.com> | 2017-05-02 13:30:07 -0400 |
commit | a0ff9e1ad221c11f58a9d8d12a84c21579132d85 (patch) | |
tree | a3fc20fdc0445a738432cf73ac65d4d4616c4b65 /gdb/alpha-tdep.c | |
parent | ea480a306d46efe3dd1839618137f0e73a80e9b3 (diff) | |
download | gdb-a0ff9e1ad221c11f58a9d8d12a84c21579132d85.zip gdb-a0ff9e1ad221c11f58a9d8d12a84c21579132d85.tar.gz gdb-a0ff9e1ad221c11f58a9d8d12a84c21579132d85.tar.bz2 |
Change return type of gdbarch_software_single_step to vector<CORE_ADDR>
This is a relatively straightforward patch that changes
gdbarch_software_single_step so it returns an std::vector<CORE_ADDR>
instead of a VEC (CORE_ADDR).
gdb/ChangeLog:
* gdbarch.sh (software_single_step): Change return type to
std::vector<CORE_ADDR>.
* gdbarch.c, gdbarch.h: Re-generate.
* arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw):
Adjust.
(arm_deal_with_atomic_sequence_raw): Adjust.
(thumb_get_next_pcs_raw): Adjust.
(arm_get_next_pcs_raw): Adjust.
(arm_get_next_pcs): Adjust.
* arch/arm-get-next-pcs.h (arm_get_next_pcs): Adjust.
* aarch64-tdep.c (aarch64_software_single_step): Adjust.
* alpha-tdep.c (alpha_deal_with_atomic_sequence): Adjust.
(alpha_software_single_step): Adjust.
* alpha-tdep.h (alpha_software_single_step): Adjust.
* arm-linux-tdep.c (arm_linux_software_single_step): Adjust.
* arm-tdep.c (arm_software_single_step): Adjust.
(arm_breakpoint_kind_from_current_state): Adjust.
* arm-tdep.h (arm_software_single_step): Adjust.
* breakpoint.c (insert_single_step_breakpoint): Adjust.
* cris-tdep.c (cris_software_single_step): Adjust.
* mips-tdep.c (mips_deal_with_atomic_sequence): Adjust.
(micromips_deal_with_atomic_sequence): Adjust.
(deal_with_atomic_sequence): Adjust.
(mips_software_single_step): Adjust.
* mips-tdep.h (mips_software_single_step): Adjust.
* moxie-tdep.c (moxie_software_single_step): Adjust.
* nios2-tdep.c (nios2_software_single_step): Adjust.
* ppc-tdep.h (ppc_deal_with_atomic_sequence): Adjust.
* rs6000-aix-tdep.c (rs6000_software_single_step): Adjust.
* rs6000-tdep.c (ppc_deal_with_atomic_sequence): Adjust.
* s390-linux-tdep.c (s390_software_single_step): Adjust.
* sparc-tdep.c (sparc_software_single_step): Adjust.
* spu-tdep.c (spu_software_single_step): Adjust.
* tic6x-tdep.c (tic6x_software_single_step): Adjust.
gdb/gdbserver/ChangeLog:
* linux-arm-low.c (arm_gdbserver_get_next_pcs): Adjust to
software_single_step change of return type to
std::vector<CORE_ADDR>.
* linux-low.c (install_software_single_step_breakpoints):
Likewise.
* linux-low.h (install_software_single_step_breakpoints):
Likewise.
Diffstat (limited to 'gdb/alpha-tdep.c')
-rw-r--r-- | gdb/alpha-tdep.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/gdb/alpha-tdep.c b/gdb/alpha-tdep.c index 7c521db..d62566c 100644 --- a/gdb/alpha-tdep.c +++ b/gdb/alpha-tdep.c @@ -765,7 +765,7 @@ static const int stq_c_opcode = 0x2f; is found, attempt to step through it. A breakpoint is placed at the end of the sequence. */ -static VEC (CORE_ADDR) * +static std::vector<CORE_ADDR> alpha_deal_with_atomic_sequence (struct regcache *regcache) { struct gdbarch *gdbarch = get_regcache_arch (regcache); @@ -779,12 +779,11 @@ alpha_deal_with_atomic_sequence (struct regcache *regcache) int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */ const int atomic_sequence_length = 16; /* Instruction sequence length. */ int bc_insn_count = 0; /* Conditional branch instruction count. */ - VEC (CORE_ADDR) *next_pcs = NULL; /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */ if (INSN_OPCODE (insn) != ldl_l_opcode && INSN_OPCODE (insn) != ldq_l_opcode) - return NULL; + return {}; /* Assume that no atomic sequence is longer than "atomic_sequence_length" instructions. */ @@ -803,8 +802,8 @@ alpha_deal_with_atomic_sequence (struct regcache *regcache) immediate = (immediate ^ 0x400000) - 0x400000; if (bc_insn_count >= 1) - return NULL; /* More than one branch found, fallback - to the standard single-step code. */ + return {}; /* More than one branch found, fallback + to the standard single-step code. */ breaks[1] = loc + ALPHA_INSN_SIZE + immediate; @@ -820,7 +819,7 @@ alpha_deal_with_atomic_sequence (struct regcache *regcache) /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */ if (INSN_OPCODE (insn) != stl_c_opcode && INSN_OPCODE (insn) != stq_c_opcode) - return NULL; + return {}; closing_insn = loc; loc += ALPHA_INSN_SIZE; @@ -835,8 +834,10 @@ alpha_deal_with_atomic_sequence (struct regcache *regcache) || (breaks[1] >= pc && breaks[1] <= closing_insn))) last_breakpoint = 0; + std::vector<CORE_ADDR> next_pcs; + for (index = 0; index <= last_breakpoint; index++) - VEC_safe_push (CORE_ADDR, next_pcs, breaks[index]); + next_pcs.push_back (breaks[index]); return next_pcs; } @@ -1717,17 +1718,15 @@ alpha_next_pc (struct regcache *regcache, CORE_ADDR pc) return (pc + ALPHA_INSN_SIZE); } -VEC (CORE_ADDR) * +std::vector<CORE_ADDR> alpha_software_single_step (struct regcache *regcache) { struct gdbarch *gdbarch = get_regcache_arch (regcache); CORE_ADDR pc; - VEC (CORE_ADDR) *next_pcs = NULL; - pc = regcache_read_pc (regcache); + pc = alpha_next_pc (regcache, regcache_read_pc (regcache)); - VEC_safe_push (CORE_ADDR, next_pcs, alpha_next_pc (regcache, pc)); - return next_pcs; + return {pc}; } |