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author | Jim Blandy <jimb@codesourcery.com> | 2004-05-10 17:07:02 +0000 |
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committer | Jim Blandy <jimb@codesourcery.com> | 2004-05-10 17:07:02 +0000 |
commit | c4143af614f9fdb6be35ad9e68711b197b63741b (patch) | |
tree | 2acd980986d06e79a3250949e5ed7da4e50b3b43 /gdb/aix-thread.c | |
parent | 2e56e9c16fddf3a47ae0b3d053a9a9e3cd3ce3fb (diff) | |
download | gdb-c4143af614f9fdb6be35ad9e68711b197b63741b.zip gdb-c4143af614f9fdb6be35ad9e68711b197b63741b.tar.gz gdb-c4143af614f9fdb6be35ad9e68711b197b63741b.tar.bz2 |
* ppc-tdep.h (struct gdbarch_tdep): Change definition of
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
Diffstat (limited to 'gdb/aix-thread.c')
-rw-r--r-- | gdb/aix-thread.c | 42 |
1 files changed, 29 insertions, 13 deletions
diff --git a/gdb/aix-thread.c b/gdb/aix-thread.c index 2f79071..dcaa3fb 100644 --- a/gdb/aix-thread.c +++ b/gdb/aix-thread.c @@ -1023,6 +1023,10 @@ supply_fprs (double *vals) struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); int regno; + /* This function should never be called on architectures without + floating-point registers. */ + gdb_assert (ppc_floating_point_p (current_gdbarch)); + for (regno = 0; regno < 32; regno++) supply_register (regno + tdep->ppc_fp0_regnum, (char *) (vals + regno)); } @@ -1039,7 +1043,7 @@ special_register_p (int regno) || regno == tdep->ppc_lr_regnum || regno == tdep->ppc_ctr_regnum || regno == tdep->ppc_xer_regnum - || regno == tdep->ppc_fpscr_regnum + || (tdep->ppc_fpscr_regnum >= 0 && regno == tdep->ppc_fpscr_regnum) || (tdep->ppc_mq_regnum >= 0 && regno == tdep->ppc_mq_regnum); } @@ -1060,7 +1064,8 @@ supply_sprs64 (uint64_t iar, uint64_t msr, uint32_t cr, supply_register (tdep->ppc_lr_regnum, (char *) &lr); supply_register (tdep->ppc_ctr_regnum, (char *) &ctr); supply_register (tdep->ppc_xer_regnum, (char *) &xer); - supply_register (tdep->ppc_fpscr_regnum, (char *) &fpscr); + if (tdep->ppc_fpscr_regnum >= 0) + supply_register (tdep->ppc_fpscr_regnum, (char *) &fpscr); } /* Record that the special registers contain the specified 32-bit @@ -1079,7 +1084,8 @@ supply_sprs32 (uint32_t iar, uint32_t msr, uint32_t cr, supply_register (tdep->ppc_lr_regnum, (char *) &lr); supply_register (tdep->ppc_ctr_regnum, (char *) &ctr); supply_register (tdep->ppc_xer_regnum, (char *) &xer); - supply_register (tdep->ppc_fpscr_regnum, (char *) &fpscr); + if (tdep->ppc_fpscr_regnum >= 0) + supply_register (tdep->ppc_fpscr_regnum, (char *) &fpscr); } /* Fetch all registers from pthread PDTID, which doesn't have a kernel @@ -1113,7 +1119,8 @@ fetch_regs_user_thread (pthdb_pthread_t pdtid) /* Floating-point registers. */ - supply_fprs (ctx.fpr); + if (ppc_floating_point_p (current_gdbarch)) + supply_fprs (ctx.fpr); /* Special registers. */ @@ -1179,9 +1186,10 @@ fetch_regs_kernel_thread (int regno, pthdb_tid_t tid) /* Floating-point registers. */ - if (regno == -1 - || (regno >= tdep->ppc_fp0_regnum - && regno < tdep->ppc_fp0_regnum + ppc_num_fprs)) + if (ppc_floating_point_unit_p (current_gdbarch) + && (regno == -1 + || (regno >= tdep->ppc_fp0_regnum + && regno < tdep->ppc_fp0_regnum + ppc_num_fprs))) { if (!ptrace32 (PTT_READ_FPRS, tid, (int *) fprs, 0, NULL)) memset (fprs, 0, sizeof (fprs)); @@ -1271,6 +1279,10 @@ fill_fprs (double *vals) struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); int regno; + /* This function should never be called on architectures without + floating-point registers. */ + gdb_assert (ppc_floating_point_p (current_gdbarch)); + for (regno = tdep->ppc_fp0_regnum; regno < tdep->ppc_fp0_regnum + ppc_num_fprs; regno++) @@ -1307,7 +1319,8 @@ fill_sprs64 (uint64_t *iar, uint64_t *msr, uint32_t *cr, regcache_collect (tdep->ppc_ctr_regnum, ctr); if (register_cached (tdep->ppc_xer_regnum)) regcache_collect (tdep->ppc_xer_regnum, xer); - if (register_cached (tdep->ppc_fpscr_regnum)) + if (tdep->ppc_fpscr_regnum >= 0 + && register_cached (tdep->ppc_fpscr_regnum)) regcache_collect (tdep->ppc_fpscr_regnum, fpscr); } @@ -1342,7 +1355,8 @@ fill_sprs32 (unsigned long *iar, unsigned long *msr, unsigned long *cr, regcache_collect (tdep->ppc_ctr_regnum, ctr); if (register_cached (tdep->ppc_xer_regnum)) regcache_collect (tdep->ppc_xer_regnum, xer); - if (register_cached (tdep->ppc_fpscr_regnum)) + if (tdep->ppc_fpscr_regnum >= 0 + && register_cached (tdep->ppc_fpscr_regnum)) regcache_collect (tdep->ppc_fpscr_regnum, fpscr); } @@ -1390,7 +1404,8 @@ store_regs_user_thread (pthdb_pthread_t pdtid) } /* Collect floating-point register values from the regcache. */ - fill_fprs (ctx.fpr); + if (ppc_floating_point_p (current_gdbarch)) + fill_fprs (ctx.fpr); /* Special registers (always kept in ctx as 64 bits). */ if (arch64) @@ -1480,9 +1495,10 @@ store_regs_kernel_thread (int regno, pthdb_tid_t tid) /* Floating-point registers. */ - if (regno == -1 - || (regno >= tdep->ppc_fp0_regnum - && regno < tdep->ppc_fp0_regnum + ppc_num_fprs)) + if (ppc_floating_point_unit_p (current_gdbarch) + && (regno == -1 + || (regno >= tdep->ppc_fp0_regnum + && regno < tdep->ppc_fp0_regnum + ppc_num_fprs))) { /* Pre-fetch: some regs may not be in the cache. */ ptrace32 (PTT_READ_FPRS, tid, (int *) fprs, 0, NULL); |