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authorAlan Hayward <alan.hayward@arm.com>2019-04-10 15:58:27 +0100
committerAlan Hayward <alan.hayward@arm.com>2019-04-11 09:51:07 +0100
commit68811f8ff84895ef1cad37ac6947f1a340dd2ae2 (patch)
tree11d0455129367a4550515a1ab977366e482e2606 /gdb/aarch64-tdep.c
parent795e3bb7de9ce2eb1ec3de3faf8f6bc925a58c9e (diff)
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AArch64: Ensure regcache is reset between tests
A recent change made the AArch64 self tests resuse the saved regs cache, rather than creating a new one. Ensure it is reset to default values between tests. Do this by splitting the reset functionality from trad_frame_alloc_saved_regs into a new function. Fixes selftest on AArch64. gdb/ChangeLog: * aarch64-tdep.c (aarch64_analyze_prologue_test): Reset saved regs. * trad-frame.c (trad_frame_reset_saved_regs): New function. (trad_frame_alloc_saved_regs): Call trad_frame_reset_saved_regs. * trad-frame.h (trad_frame_reset_saved_regs): New declaration.
Diffstat (limited to 'gdb/aarch64-tdep.c')
-rw-r--r--gdb/aarch64-tdep.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 7eecb52..1b3977b 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -665,6 +665,7 @@ aarch64_analyze_prologue_test (void)
};
instruction_reader_test reader (insns);
+ trad_frame_reset_saved_regs (gdbarch, cache.saved_regs);
CORE_ADDR end = aarch64_analyze_prologue (gdbarch, 0, 128, &cache, reader);
SELF_CHECK (end == 4 * 5);
@@ -707,6 +708,7 @@ aarch64_analyze_prologue_test (void)
};
instruction_reader_test reader (insns);
+ trad_frame_reset_saved_regs (gdbarch, cache.saved_regs);
CORE_ADDR end = aarch64_analyze_prologue (gdbarch, 0, 128, &cache,
reader);