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authorJohn Baldwin <jhb@FreeBSD.org>2017-08-08 23:25:42 -0700
committerJohn Baldwin <jhb@FreeBSD.org>2017-09-06 09:40:47 -0700
commitc0f84956d0df0f004e31a987ecc77ea0d293e62c (patch)
treecc6843c1923462a0f74717ee72082e43c19a4fb7 /gdb/aarch64-fbsd-tdep.h
parent7610297ab578854a5e9ff1247a77398a60d70f91 (diff)
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Add FreeBSD/aarch64 architecture.
Support for collecting and supplying general purpose and floating point register sets is provided along with signal frame unwinding. gdb/ChangeLog: * Makefile.in (ALL_64_TARGET_OBS): Add aarch64-fbsd-tdep.o. (ALLDEPFILES): Add aarch64-fbsd-tdep.c. * NEWS: Mention new FreeBSD/aarch64 target. * configure.tgt: Add aarch64*-*-freebsd*. * aarch64-fbsd-tdep.c: New file. * aarch64-fbsd-tdep.h: New file.
Diffstat (limited to 'gdb/aarch64-fbsd-tdep.h')
-rw-r--r--gdb/aarch64-fbsd-tdep.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/gdb/aarch64-fbsd-tdep.h b/gdb/aarch64-fbsd-tdep.h
new file mode 100644
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+++ b/gdb/aarch64-fbsd-tdep.h
@@ -0,0 +1,33 @@
+/* FreeBSD/aarch64 target support, prototypes.
+
+ Copyright (C) 2017 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "regset.h"
+
+/* The general-purpose regset consists of 30 X registers, plus LR, SP,
+ ELR, and SPSR registers. SPSR is 32 bits but the structure is
+ passed to 64 bit alignment. */
+#define AARCH64_FBSD_SIZEOF_GREGSET (34 * X_REGISTER_SIZE)
+
+/* The fp regset consists of 32 V registers, plus FPSR and FPCR which
+ are 4 bytes wide each, and the whole structure is padded to 128 bit
+ alignment. */
+#define AARCH64_FBSD_SIZEOF_FPREGSET (33 * V_REGISTER_SIZE)
+
+extern const struct regset aarch64_fbsd_gregset;
+extern const struct regset aarch64_fbsd_fpregset;