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author | Alan Hayward <alan.hayward@arm.com> | 2019-04-15 12:31:21 +0100 |
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committer | Alan Hayward <alan.hayward@arm.com> | 2019-04-15 15:12:44 +0100 |
commit | 48574d91bf1289074f2c88b1f83aa3cd37d524d9 (patch) | |
tree | 8bb9c8cbd7c8c487de165db5fd0fe8914f5036d7 /gdb/ChangeLog | |
parent | 4da037ef9dba6c17089250d228efdbe6f7d830c9 (diff) | |
download | gdb-48574d91bf1289074f2c88b1f83aa3cd37d524d9.zip gdb-48574d91bf1289074f2c88b1f83aa3cd37d524d9.tar.gz gdb-48574d91bf1289074f2c88b1f83aa3cd37d524d9.tar.bz2 |
AArch64 SVE: Support changing vector lengths for ptrace
When writing registers to the kernel, check if regcache VG has been changed. If
so then update the thread's vector length, then write back the registers.
When reading registers from the kernel, ensure regcache VG register is updated.
The regcache registers should already be of the correct length.
Remove all the checks that error if the vector length has changed.
gdb/ChangeLog:
* aarch64-linux-nat.c (store_sveregs_to_thread): Set vector length.
* nat/aarch64-sve-linux-ptrace.c (aarch64_sve_set_vq): New function.
(aarch64_sve_regs_copy_to_reg_buf): Remove VG checks.
(aarch64_sve_regs_copy_from_reg_buf): Likewise.
* nat/aarch64-sve-linux-ptrace.h (aarch64_sve_set_vq): New declaration.
Diffstat (limited to 'gdb/ChangeLog')
-rw-r--r-- | gdb/ChangeLog | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index b3155ad..4e73bf7 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,15 @@ 2019-04-15 Alan Hayward <alan.hayward@arm.com> + * aarch64-linux-nat.c (store_sveregs_to_thread): Set vector length. + * nat/aarch64-sve-linux-ptrace.c (aarch64_sve_set_vq): New + function. + (aarch64_sve_regs_copy_to_reg_buf): Remove VG checks. + (aarch64_sve_regs_copy_from_reg_buf): Likewise. + * nat/aarch64-sve-linux-ptrace.h (aarch64_sve_set_vq): New + declaration. + +2019-04-15 Alan Hayward <alan.hayward@arm.com> + * aarch64-linux-nat.c (aarch64_linux_nat_target::thread_architecture): Add override. * aarch64-tdep.c (aarch64_gdbarch_init): Ensure different tdesc for |