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author | H.J. Lu <hjl.tools@gmail.com> | 2018-09-14 11:25:01 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2018-09-14 11:25:13 -0700 |
commit | 70df6fc9bc9e114f46532dbe58caa98e495b119c (patch) | |
tree | 519de0f8ff83cde2203009604bab10ccf17b2b9b /gas | |
parent | d20dee9efad3c23c9098f03ac785037572258483 (diff) | |
download | gdb-70df6fc9bc9e114f46532dbe58caa98e495b119c.zip gdb-70df6fc9bc9e114f46532dbe58caa98e495b119c.tar.gz gdb-70df6fc9bc9e114f46532dbe58caa98e495b119c.tar.bz2 |
x86: Handle unsupported static rounding in vcvt[u]si2sd in 32-bit mode
Update x86 disassembler to handle the unsupported static rounding in
vcvt[u]si2sd in 32-bit mode.
gas/
PR binutils/23655
* testsuite/gas/i386/evex.d: Updated.
opcodes/
PR binutils/23655
* i386-dis-evex.h: Replace EXxEVexR with EXxEVexR64 for
vcvtsi2sd%LQ and vcvtusi2sd%LQ.
* i386-dis.c (EXxEVexR64): New.
(evex_rounding_64_mode): Likewise.
(OP_Rounding): Handle evex_rounding_64_mode.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/evex.d | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 52346d7..7b24076 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,6 +1,11 @@ 2018-09-14 H.J. Lu <hongjiu.lu@intel.com> PR binutils/23655 + * testsuite/gas/i386/evex.d: Updated. + +2018-09-14 H.J. Lu <hongjiu.lu@intel.com> + + PR binutils/23655 * testsuite/gas/i386/evex.d: New file. * testsuite/gas/i386/evex.s: Likewise. * testsuite/gas/i386/i386.exp: Run evex. diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d index ffbcdc1..2fbe295 100644 --- a/gas/testsuite/gas/i386/evex.d +++ b/gas/testsuite/gas/i386/evex.d @@ -8,9 +8,9 @@ Disassembly of section .text: 0+ <_start>: +[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\{rd-sae\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\(bad\),%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ssl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\{rd-sae\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6 #pass |