PR20744, Incorrect PowerPC VLE relocs

VLE 16A and 16D relocs were functionally swapped.

	PR 20744
include/
	* opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
bfd/
	* elf32-ppc.h (struct ppc_elf_params): Add vle_reloc_fixup field.
	* elf32-ppc.c: Include opcode/ppc.h.
	(ppc_elf_howto_raw): Correct dst_mask for R_PPC_VLE_LO16A,
	R_PPC_VLE_LO16D, R_PPC_VLE_HI16A, R_PPC_VLE_HI16D, R_PPC_VLE_HA16A,
	R_PPC_VLE_HA16D, R_PPC_VLE_SDAREL_LO16A, R_PPC_VLE_SDAREL_LO16D,
	R_PPC_VLE_SDAREL_HI16A, R_PPC_VLE_SDAREL_HI16D,
	R_PPC_VLE_SDAREL_HA16A, and R_PPC_VLE_SDAREL_HA16D relocs.
	(ppc_elf_link_hash_table_create): Update default_params init.
	(ppc_elf_vle_split16): Correct shift and mask.  Add params.
	Report or fix insn/reloc mismatches.
	(ppc_elf_relocate_section): Pass input_section, offset and fixup
	to ppc_elf_vle_split16.
binutils/
	* NEWS: Mention PowerPC VLE relocation error.
gas/
	* config/tc-ppc.c: Delete VLE insn defines.
	(md_assemble): Swap use_a_reloc and use_d_reloc.
	* testsuite/gas/ppc/vle-reloc.d: Update.
ld/
	* emultempl/ppc32elf.em (params): Update initializer.  Handle
	--vle-reloc-fixup command line arg.

3 files changed, 82 insertions, 91 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 134f24b..71cc677 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2016-11-22  Alan Modra  <amodra@gmail.com>
+
+	PR 20744
+	* config/tc-ppc.c: Delete VLE insn defines.
+	(md_assemble): Swap use_a_reloc and use_d_reloc.
+	* testsuite/gas/ppc/vle-reloc.d: Update.
+
 2016-11-21  Renlin Li  <renlin.li@arm.com>
 
 	PR gas/20827
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 5c7b09f..84d4ebc 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -2617,22 +2617,6 @@ struct ppc_fixup
 
 #define MAX_INSN_FIXUPS (5)
 
-/* Form I16L.  */
-#define E_OR2I_INSN		0x7000C000
-#define E_AND2I_DOT_INSN	0x7000C800
-#define E_OR2IS_INSN		0x7000D000
-#define E_LIS_INSN		0x7000E000
-#define	E_AND2IS_DOT_INSN	0x7000E800
-
-/* Form I16A.  */
-#define E_ADD2I_DOT_INSN	0x70008800
-#define E_ADD2IS_INSN		0x70009000
-#define E_CMP16I_INSN		0x70009800
-#define E_MULL2I_INSN		0x7000A000
-#define E_CMPL16I_INSN		0x7000A800
-#define E_CMPH16I_INSN		0x7000B000
-#define E_CMPHL16I_INSN		0x7000B800
-
 /* This routine is called for each instruction to be assembled.  */
 
 void
@@ -3113,14 +3097,14 @@ md_assemble (char *str)
 		{
 		  int tmp_insn = insn & opcode->mask;
 
-		  int use_d_reloc = (tmp_insn == E_OR2I_INSN
+		  int use_a_reloc = (tmp_insn == E_OR2I_INSN
 				     || tmp_insn == E_AND2I_DOT_INSN
 				     || tmp_insn == E_OR2IS_INSN
 				     || tmp_insn == E_LIS_INSN
 				     || tmp_insn == E_AND2IS_DOT_INSN);
 
 
-		  int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
+		  int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN
 				     || tmp_insn == E_ADD2IS_INSN
 				     || tmp_insn == E_CMP16I_INSN
 				     || tmp_insn == E_MULL2I_INSN
diff --git a/gas/testsuite/gas/ppc/vle-reloc.d b/gas/testsuite/gas/ppc/vle-reloc.d
index 01eba4a..dad153f 100644
--- a/gas/testsuite/gas/ppc/vle-reloc.d
+++ b/gas/testsuite/gas/ppc/vle-reloc.d
@@ -25,148 +25,148 @@ Disassembly of section \.text:
 			14: R_PPC_VLE_REL15	sub5
 
   18:	70 20 c0 00 	e_or2i  r1,0
-			18: R_PPC_VLE_LO16D	low
+			18: R_PPC_VLE_LO16A	low
   1c:	70 40 c0 00 	e_or2i  r2,0
-			1c: R_PPC_VLE_HI16D	high
+			1c: R_PPC_VLE_HI16A	high
   20:	70 60 c0 00 	e_or2i  r3,0
-			20: R_PPC_VLE_HA16D	high_adjust
+			20: R_PPC_VLE_HA16A	high_adjust
   24:	70 80 c0 00 	e_or2i  r4,0
-			24: R_PPC_VLE_SDAREL_LO16D	low_sdarel
+			24: R_PPC_VLE_SDAREL_LO16A	low_sdarel
   28:	70 a0 c0 00 	e_or2i  r5,0
-			28: R_PPC_VLE_SDAREL_HI16D	high_sdarel
+			28: R_PPC_VLE_SDAREL_HI16A	high_sdarel
   2c:	70 40 c0 00 	e_or2i  r2,0
-			2c: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
+			2c: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
   30:	70 20 c8 00 	e_and2i. r1,0
-			30: R_PPC_VLE_LO16D	low
+			30: R_PPC_VLE_LO16A	low
   34:	70 40 c8 00 	e_and2i. r2,0
-			34: R_PPC_VLE_HI16D	high
+			34: R_PPC_VLE_HI16A	high
   38:	70 60 c8 00 	e_and2i. r3,0
-			38: R_PPC_VLE_HA16D	high_adjust
+			38: R_PPC_VLE_HA16A	high_adjust
   3c:	70 80 c8 00 	e_and2i. r4,0
-			3c: R_PPC_VLE_SDAREL_LO16D	low_sdarel
+			3c: R_PPC_VLE_SDAREL_LO16A	low_sdarel
   40:	70 a0 c8 00 	e_and2i. r5,0
-			40: R_PPC_VLE_SDAREL_HI16D	high_sdarel
+			40: R_PPC_VLE_SDAREL_HI16A	high_sdarel
   44:	70 40 c8 00 	e_and2i. r2,0
-			44: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
+			44: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
   48:	70 40 c8 00 	e_and2i. r2,0
-			48: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
+			48: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
   4c:	70 20 d0 00 	e_or2is r1,0
-			4c: R_PPC_VLE_LO16D	low
+			4c: R_PPC_VLE_LO16A	low
   50:	70 40 d0 00 	e_or2is r2,0
-			50: R_PPC_VLE_HI16D	high
+			50: R_PPC_VLE_HI16A	high
   54:	70 60 d0 00 	e_or2is r3,0
-			54: R_PPC_VLE_HA16D	high_adjust
+			54: R_PPC_VLE_HA16A	high_adjust
   58:	70 80 d0 00 	e_or2is r4,0
-			58: R_PPC_VLE_SDAREL_LO16D	low_sdarel
+			58: R_PPC_VLE_SDAREL_LO16A	low_sdarel
   5c:	70 a0 d0 00 	e_or2is r5,0
-			5c: R_PPC_VLE_SDAREL_HI16D	high_sdarel
+			5c: R_PPC_VLE_SDAREL_HI16A	high_sdarel
   60:	70 40 d0 00 	e_or2is r2,0
-			60: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
+			60: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
   64:	70 20 e0 00 	e_lis   r1,0
-			64: R_PPC_VLE_LO16D	low
+			64: R_PPC_VLE_LO16A	low
   68:	70 40 e0 00 	e_lis   r2,0
-			68: R_PPC_VLE_HI16D	high
+			68: R_PPC_VLE_HI16A	high
   6c:	70 60 e0 00 	e_lis   r3,0
-			6c: R_PPC_VLE_HA16D	high_adjust
+			6c: R_PPC_VLE_HA16A	high_adjust
   70:	70 80 e0 00 	e_lis   r4,0
-			70: R_PPC_VLE_SDAREL_LO16D	low_sdarel
+			70: R_PPC_VLE_SDAREL_LO16A	low_sdarel
   74:	70 a0 e0 00 	e_lis   r5,0
-			74: R_PPC_VLE_SDAREL_HI16D	high_sdarel
+			74: R_PPC_VLE_SDAREL_HI16A	high_sdarel
   78:	70 40 e0 00 	e_lis   r2,0
-			78: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
+			78: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
   7c:	70 20 e8 00 	e_and2is. r1,0
-			7c: R_PPC_VLE_LO16D	low
+			7c: R_PPC_VLE_LO16A	low
   80:	70 40 e8 00 	e_and2is. r2,0
-			80: R_PPC_VLE_HI16D	high
+			80: R_PPC_VLE_HI16A	high
   84:	70 60 e8 00 	e_and2is. r3,0
-			84: R_PPC_VLE_HA16D	high_adjust
+			84: R_PPC_VLE_HA16A	high_adjust
   88:	70 80 e8 00 	e_and2is. r4,0
-			88: R_PPC_VLE_SDAREL_LO16D	low_sdarel
+			88: R_PPC_VLE_SDAREL_LO16A	low_sdarel
   8c:	70 a0 e8 00 	e_and2is. r5,0
-			8c: R_PPC_VLE_SDAREL_HI16D	high_sdarel
+			8c: R_PPC_VLE_SDAREL_HI16A	high_sdarel
   90:	70 40 e8 00 	e_and2is. r2,0
-			90: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
+			90: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
   94:	70 01 98 00 	e_cmp16i r1,0
-			94: R_PPC_VLE_LO16A	low
+			94: R_PPC_VLE_LO16D	low
   98:	70 02 98 00 	e_cmp16i r2,0
-			98: R_PPC_VLE_HI16A	high
+			98: R_PPC_VLE_HI16D	high
   9c:	70 03 98 00 	e_cmp16i r3,0
-			9c: R_PPC_VLE_HA16A	high_adjust
+			9c: R_PPC_VLE_HA16D	high_adjust
   a0:	70 04 98 00 	e_cmp16i r4,0
-			a0: R_PPC_VLE_SDAREL_LO16A	low_sdarel
+			a0: R_PPC_VLE_SDAREL_LO16D	low_sdarel
   a4:	70 05 98 00 	e_cmp16i r5,0
-			a4: R_PPC_VLE_SDAREL_HI16A	high_sdarel
+			a4: R_PPC_VLE_SDAREL_HI16D	high_sdarel
   a8:	70 02 98 00 	e_cmp16i r2,0
-			a8: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
+			a8: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
   ac:	70 01 a8 00 	e_cmpl16i r1,0
-			ac: R_PPC_VLE_LO16A	low
+			ac: R_PPC_VLE_LO16D	low
   b0:	70 02 a8 00 	e_cmpl16i r2,0
-			b0: R_PPC_VLE_HI16A	high
+			b0: R_PPC_VLE_HI16D	high
   b4:	70 03 a8 00 	e_cmpl16i r3,0
-			b4: R_PPC_VLE_HA16A	high_adjust
+			b4: R_PPC_VLE_HA16D	high_adjust
   b8:	70 04 a8 00 	e_cmpl16i r4,0
-			b8: R_PPC_VLE_SDAREL_LO16A	low_sdarel
+			b8: R_PPC_VLE_SDAREL_LO16D	low_sdarel
   bc:	70 05 a8 00 	e_cmpl16i r5,0
-			bc: R_PPC_VLE_SDAREL_HI16A	high_sdarel
+			bc: R_PPC_VLE_SDAREL_HI16D	high_sdarel
   c0:	70 02 a8 00 	e_cmpl16i r2,0
-			c0: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
+			c0: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
   c4:	70 01 b0 00 	e_cmph16i r1,0
-			c4: R_PPC_VLE_LO16A	low
+			c4: R_PPC_VLE_LO16D	low
   c8:	70 02 b0 00 	e_cmph16i r2,0
-			c8: R_PPC_VLE_HI16A	high
+			c8: R_PPC_VLE_HI16D	high
   cc:	70 03 b0 00 	e_cmph16i r3,0
-			cc: R_PPC_VLE_HA16A	high_adjust
+			cc: R_PPC_VLE_HA16D	high_adjust
   d0:	70 04 b0 00 	e_cmph16i r4,0
-			d0: R_PPC_VLE_SDAREL_LO16A	low_sdarel
+			d0: R_PPC_VLE_SDAREL_LO16D	low_sdarel
   d4:	70 05 b0 00 	e_cmph16i r5,0
-			d4: R_PPC_VLE_SDAREL_HI16A	high_sdarel
+			d4: R_PPC_VLE_SDAREL_HI16D	high_sdarel
   d8:	70 02 b0 00 	e_cmph16i r2,0
-			d8: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
+			d8: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
   dc:	70 01 b8 00 	e_cmphl16i r1,0
-			dc: R_PPC_VLE_LO16A	low
+			dc: R_PPC_VLE_LO16D	low
   e0:	70 02 b8 00 	e_cmphl16i r2,0
-			e0: R_PPC_VLE_HI16A	high
+			e0: R_PPC_VLE_HI16D	high
   e4:	70 03 b8 00 	e_cmphl16i r3,0
-			e4: R_PPC_VLE_HA16A	high_adjust
+			e4: R_PPC_VLE_HA16D	high_adjust
   e8:	70 04 b8 00 	e_cmphl16i r4,0
-			e8: R_PPC_VLE_SDAREL_LO16A	low_sdarel
+			e8: R_PPC_VLE_SDAREL_LO16D	low_sdarel
   ec:	70 05 b8 00 	e_cmphl16i r5,0
-			ec: R_PPC_VLE_SDAREL_HI16A	high_sdarel
+			ec: R_PPC_VLE_SDAREL_HI16D	high_sdarel
   f0:	70 02 b8 00 	e_cmphl16i r2,0
-			f0: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
+			f0: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
   f4:	70 01 88 00 	e_add2i. r1,0
-			f4: R_PPC_VLE_LO16A	low
+			f4: R_PPC_VLE_LO16D	low
   f8:	70 02 88 00 	e_add2i. r2,0
-			f8: R_PPC_VLE_HI16A	high
+			f8: R_PPC_VLE_HI16D	high
   fc:	70 03 88 00 	e_add2i. r3,0
-			fc: R_PPC_VLE_HA16A	high_adjust
+			fc: R_PPC_VLE_HA16D	high_adjust
  100:	70 04 88 00 	e_add2i. r4,0
-			100: R_PPC_VLE_SDAREL_LO16A	low_sdarel
+			100: R_PPC_VLE_SDAREL_LO16D	low_sdarel
  104:	70 05 88 00 	e_add2i. r5,0
-			104: R_PPC_VLE_SDAREL_HI16A	high_sdarel
+			104: R_PPC_VLE_SDAREL_HI16D	high_sdarel
  108:	70 02 88 00 	e_add2i. r2,0
-			108: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
+			108: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
  10c:	70 01 90 00 	e_add2is r1,0
-			10c: R_PPC_VLE_LO16A	low
+			10c: R_PPC_VLE_LO16D	low
  110:	70 02 90 00 	e_add2is r2,0
-			110: R_PPC_VLE_HI16A	high
+			110: R_PPC_VLE_HI16D	high
  114:	70 03 90 00 	e_add2is r3,0
-			114: R_PPC_VLE_HA16A	high_adjust
+			114: R_PPC_VLE_HA16D	high_adjust
  118:	70 04 90 00 	e_add2is r4,0
-			118: R_PPC_VLE_SDAREL_LO16A	low_sdarel
+			118: R_PPC_VLE_SDAREL_LO16D	low_sdarel
  11c:	70 05 90 00 	e_add2is r5,0
-			11c: R_PPC_VLE_SDAREL_HI16A	high_sdarel
+			11c: R_PPC_VLE_SDAREL_HI16D	high_sdarel
  120:	70 02 90 00 	e_add2is r2,0
-			120: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
+			120: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel
  124:	70 01 a0 00 	e_mull2i r1,0
-			124: R_PPC_VLE_LO16A	low
+			124: R_PPC_VLE_LO16D	low
  128:	70 02 a0 00 	e_mull2i r2,0
-			128: R_PPC_VLE_HI16A	high
+			128: R_PPC_VLE_HI16D	high
  12c:	70 03 a0 00 	e_mull2i r3,0
-			12c: R_PPC_VLE_HA16A	high_adjust
+			12c: R_PPC_VLE_HA16D	high_adjust
  130:	70 04 a0 00 	e_mull2i r4,0
-			130: R_PPC_VLE_SDAREL_LO16A	low_sdarel
+			130: R_PPC_VLE_SDAREL_LO16D	low_sdarel
  134:	70 05 a0 00 	e_mull2i r5,0
-			134: R_PPC_VLE_SDAREL_HI16A	high_sdarel
+			134: R_PPC_VLE_SDAREL_HI16D	high_sdarel
  138:	70 02 a0 00 	e_mull2i r2,0
-			138: R_PPC_VLE_SDAREL_HA16A	high_adjust_sdarel
+			138: R_PPC_VLE_SDAREL_HA16D	high_adjust_sdarel