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| author | Jan Beulich <jbeulich@suse.com> | 2020-07-14 10:24:26 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-07-14 10:24:26 +0200 |
| commit | e184e6110e2836bb0ec712e380dbcac402fe4056 (patch) | |
| tree | 93fc77dc46849ff3754484d0bcafd453d2c5af3f /gas | |
| parent | e8b5d5f9713b7c74f95c4ff573ddeb7ebdb3fbc3 (diff) | |
| download | gdb-e184e6110e2836bb0ec712e380dbcac402fe4056.zip gdb-e184e6110e2836bb0ec712e380dbcac402fe4056.tar.gz gdb-e184e6110e2836bb0ec712e380dbcac402fe4056.tar.bz2 | |
x86-64: don't hide an empty but meaningless REX prefix
Unlike for non-zero values passed to USED_REX(), where rex_used gets
updated only when the respective bit was actually set in the encoding,
zero getting passed in is not further guarded, yet such a (potentially
"empty") REX prefix takes effect only when there are registers numbered
4 and up.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-pseudos.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-pseudos.s | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-reg-intel.d | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-reg.d | 8 |
5 files changed, 22 insertions, 8 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index ba55ed9..557e75f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,6 +1,14 @@ 2020-07-14 Jan Beulich <jbeulich@suse.com> * testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for + ModR/M-encoded byte register cases. + * testsuite/gas/i386/x86-64-pseudos.d, + testsuite/gas/i386/x86-64-reg-intel.d, + testsuite/gas/i386/x86-64-reg.d: Adjust expectations. + +2020-07-14 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for not-ModR/M-encoded byte register cases. * testsuite/gas/i386/x86-64-pseudos.d: Adjust expectations. diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.d b/gas/testsuite/gas/i386/x86-64-pseudos.d index 26944b9..7e17b14 100644 --- a/gas/testsuite/gas/i386/x86-64-pseudos.d +++ b/gas/testsuite/gas/i386/x86-64-pseudos.d @@ -303,6 +303,9 @@ Disassembly of section .text: +[a-f0-9]+: 88 c4 mov %al,%ah +[a-f0-9]+: 40 d3 e0 rex shl %cl,%eax +[a-f0-9]+: 40 a0 01 00 00 00 00 00 00 00 rex movabs 0x1,%al + +[a-f0-9]+: 40 38 ca rex cmp %cl,%dl + +[a-f0-9]+: 40 b3 01 rex mov \$(0x)?1,%bl + +[a-f0-9]+: f2 40 0f 38 f0 c1 rex crc32b? %cl,%eax +[a-f0-9]+: 40 89 c3 rex mov %eax,%ebx +[a-f0-9]+: 41 89 c6 mov %eax,%r14d +[a-f0-9]+: 41 89 00 mov %eax,\(%r8\) diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.s b/gas/testsuite/gas/i386/x86-64-pseudos.s index 0529075..1bd8818 100644 --- a/gas/testsuite/gas/i386/x86-64-pseudos.s +++ b/gas/testsuite/gas/i386/x86-64-pseudos.s @@ -307,6 +307,9 @@ _start: {rex} mov %al,%ah {rex} shl %cl, %eax {rex} movabs 1, %al + {rex} cmp %cl, %dl + {rex} mov $1, %bl + {rex} crc32 %cl, %eax {rex} movl %eax,%ebx {rex} movl %eax,%r14d {rex} movl %eax,(%r8) diff --git a/gas/testsuite/gas/i386/x86-64-reg-intel.d b/gas/testsuite/gas/i386/x86-64-reg-intel.d index 00120b7..f6974c8 100644 --- a/gas/testsuite/gas/i386/x86-64-reg-intel.d +++ b/gas/testsuite/gas/i386/x86-64-reg-intel.d @@ -26,10 +26,10 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 73 f6 02 psllq mm6,0x2 [ ]*[a-f0-9]+: 66 41 0f 73 f2 02 psllq xmm10,0x2 [ ]*[a-f0-9]+: 66 41 0f 73 fa 02 pslldq xmm10,0x2 -[ ]*[a-f0-9]+: 40 80 c0 01[ ]+add al,0x1 -[ ]*[a-f0-9]+: 40 80 c1 01[ ]+add cl,0x1 -[ ]*[a-f0-9]+: 40 80 c2 01[ ]+add dl,0x1 -[ ]*[a-f0-9]+: 40 80 c3 01[ ]+add bl,0x1 +[ ]*[a-f0-9]+: 40 80 c0 01[ ]+rex add al,0x1 +[ ]*[a-f0-9]+: 40 80 c1 01[ ]+rex add cl,0x1 +[ ]*[a-f0-9]+: 40 80 c2 01[ ]+rex add dl,0x1 +[ ]*[a-f0-9]+: 40 80 c3 01[ ]+rex add bl,0x1 [ ]*[a-f0-9]+: 40 80 c4 01[ ]+add spl,0x1 [ ]*[a-f0-9]+: 40 80 c5 01[ ]+add bpl,0x1 [ ]*[a-f0-9]+: 40 80 c6 01[ ]+add sil,0x1 diff --git a/gas/testsuite/gas/i386/x86-64-reg.d b/gas/testsuite/gas/i386/x86-64-reg.d index 292a827..ae9c054 100644 --- a/gas/testsuite/gas/i386/x86-64-reg.d +++ b/gas/testsuite/gas/i386/x86-64-reg.d @@ -25,10 +25,10 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 73 f6 02 psllq \$0x2,%mm6 [ ]*[a-f0-9]+: 66 41 0f 73 f2 02 psllq \$0x2,%xmm10 [ ]*[a-f0-9]+: 66 41 0f 73 fa 02 pslldq \$0x2,%xmm10 -[ ]*[a-f0-9]+: 40 80 c0 01[ ]+add \$0x1,%al -[ ]*[a-f0-9]+: 40 80 c1 01[ ]+add \$0x1,%cl -[ ]*[a-f0-9]+: 40 80 c2 01[ ]+add \$0x1,%dl -[ ]*[a-f0-9]+: 40 80 c3 01[ ]+add \$0x1,%bl +[ ]*[a-f0-9]+: 40 80 c0 01[ ]+rex add \$0x1,%al +[ ]*[a-f0-9]+: 40 80 c1 01[ ]+rex add \$0x1,%cl +[ ]*[a-f0-9]+: 40 80 c2 01[ ]+rex add \$0x1,%dl +[ ]*[a-f0-9]+: 40 80 c3 01[ ]+rex add \$0x1,%bl [ ]*[a-f0-9]+: 40 80 c4 01[ ]+add \$0x1,%spl [ ]*[a-f0-9]+: 40 80 c5 01[ ]+add \$0x1,%bpl [ ]*[a-f0-9]+: 40 80 c6 01[ ]+add \$0x1,%sil |