Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND

bfd/

	* elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_PC32_BND
	and R_X86_64_PLT32_BND.
	(R_X86_64_standard): Replace R_X86_64_RELATIVE64 with
	R_X86_64_PLT32_BND.
	(IS_X86_64_PCREL_TYPE): Add R_X86_64_PLT32_BND.
	(x86_64_reloc_map): Add BFD_RELOC_X86_64_PC32_BND and
	BFD_RELOC_X86_64_PLT32_BND.
	(elf_x86_64_check_relocs): Handle R_X86_64_PC32_BND and
	R_X86_64_PLT32_BND.
	(elf_x86_64_gc_sweep_hook): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	* reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_PC32_BND
	and BFD_RELOC_X86_64_PLT32_BND.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
	indicate if instruction has the BND prefix.  Return
	BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
	bnd_prefix isn't zero.
	(output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
	if needed.
	(output_jump): Update reloc call.
	(output_interseg_jump): Likewise.
	(output_disp): Likewise.
	(output_imm): Likewise.
	(x86_cons_fix_new): Likewise.
	(lex_got): Add an argument, bnd_prefix, to indicate if
	instruction has the BND prefix.  Use BFD_RELOC_X86_64_PLT32_BND
	if needed.
	(x86_cons): Update lex_got call.
	(i386_immediate): Likewise.
	(i386_displacement): Likewise.
	(md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
	BFD_RELOC_X86_64_PLT32_BND.
	(tc_gen_reloc): Likewise.
	* config/tc-i386-intel.c (i386_operator): Update lex_got call.

gas/testsuite/

	* gas/i386/i386.exp: Run x86-64-mpx-branch-1 and
	x86-64-mpx-branch-2 on 64-bit ELF targets.
	* gas/i386/x86-64-mpx-branch-1.d: New file.
	* gas/i386/x86-64-mpx-branch-1.s: Likewise.
	* gas/i386/x86-64-mpx-branch-2.d: Likewise.
	* gas/i386/x86-64-mpx-branch-2.s: Likewise.

include/elf/

	* x86-64.h: Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND.

ld/testsuite/

	* ld-x86-64/mpx.exp: New file.
	* ld-x86-64/mpx1.out: Likewise.
	* ld-x86-64/mpx1a.c: Likewise.
	* ld-x86-64/mpx1a.rd: Likewise.
	* ld-x86-64/mpx1b.c: Likewise.
	* ld-x86-64/mpx1c.c: Likewise.
	* ld-x86-64/mpx1c.rd: Likewise.

9 files changed, 172 insertions, 14 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index c72d37a..8127a9b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,27 @@
+2013-11-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
+	indicate if instruction has the BND prefix.  Return
+	BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
+	bnd_prefix isn't zero.
+	(output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
+	if needed.
+	(output_jump): Update reloc call.
+	(output_interseg_jump): Likewise.
+	(output_disp): Likewise.
+	(output_imm): Likewise.
+	(x86_cons_fix_new): Likewise.
+	(lex_got): Add an argument, bnd_prefix, to indicate if
+	instruction has the BND prefix.  Use BFD_RELOC_X86_64_PLT32_BND
+	if needed.
+	(x86_cons): Update lex_got call.
+	(i386_immediate): Likewise.
+	(i386_displacement): Likewise.
+	(md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
+	BFD_RELOC_X86_64_PLT32_BND.
+	(tc_gen_reloc): Likewise.
+	* config/tc-i386-intel.c (i386_operator): Update lex_got call.
+
 2013-11-15  Yufeng Zhang  <yufeng.zhang@arm.com>
 
 	* config/tc-aarch64.c (set_other_error): New function.
diff --git a/gas/config/tc-i386-intel.c b/gas/config/tc-i386-intel.c
index e534110..8a2224a 100644
--- a/gas/config/tc-i386-intel.c
+++ b/gas/config/tc-i386-intel.c
@@ -142,7 +142,9 @@ operatorT i386_operator (const char *name, unsigned int operands, char *pc)
 	      int adjust = 0;
 	      char *gotfree_input_line = lex_got (&i.reloc[this_operand],
 						  &adjust,
-						  &intel_state.reloc_types);
+						  &intel_state.reloc_types,
+						  (i.bnd_prefix != NULL
+						   || add_bnd_prefix));
 
 	      if (!gotfree_input_line)
 		break;
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 4ce772c..7c26bca 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2800,6 +2800,7 @@ static bfd_reloc_code_real_type
 reloc (unsigned int size,
        int pcrel,
        int sign,
+       int bnd_prefix,
        bfd_reloc_code_real_type other)
 {
   if (other != NO_RELOC)
@@ -2872,7 +2873,9 @@ reloc (unsigned int size,
 	{
 	case 1: return BFD_RELOC_8_PCREL;
 	case 2: return BFD_RELOC_16_PCREL;
-	case 4: return BFD_RELOC_32_PCREL;
+	case 4: return (bnd_prefix && object_64bit
+			? BFD_RELOC_X86_64_PC32_BND
+			: BFD_RELOC_32_PCREL);
 	case 8: return BFD_RELOC_64_PCREL;
 	}
       as_bad (_("cannot do %u byte pc-relative relocation"), size);
@@ -6716,7 +6719,13 @@ output_branch (void)
 
   /* 1 possible extra opcode + 4 byte displacement go in var part.
      Pass reloc in fr_var.  */
-  frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);
+  frag_var (rs_machine_dependent, 5,
+	    ((!object_64bit
+	      || i.reloc[0] != NO_RELOC 
+	      || (i.bnd_prefix == NULL && !add_bnd_prefix))
+	     ? i.reloc[0]
+	     : BFD_RELOC_X86_64_PC32_BND),
+	    subtype, sym, off, p);
 }
 
 static void
@@ -6792,7 +6801,10 @@ output_jump (void)
     }
 
   fixP = fix_new_exp (frag_now, p - frag_now->fr_literal, size,
-		      i.op[0].disps, 1, reloc (size, 1, 1, i.reloc[0]));
+		      i.op[0].disps, 1, reloc (size, 1, 1,
+					       (i.bnd_prefix != NULL
+						|| add_bnd_prefix),
+					       i.reloc[0]));
 
   /* All jumps handled here are signed, but don't use a signed limit
      check for 32 and 16 bit jumps as we want to allow wrap around at
@@ -6858,7 +6870,7 @@ output_interseg_jump (void)
     }
   else
     fix_new_exp (frag_now, p - frag_now->fr_literal, size,
-		 i.op[1].imms, 0, reloc (size, 0, 0, i.reloc[1]));
+		 i.op[1].imms, 0, reloc (size, 0, 0, 0, i.reloc[1]));
   if (i.op[0].imms->X_op != O_constant)
     as_bad (_("can't handle non absolute segment in `%s'"),
 	    i.tm.name);
@@ -7117,7 +7129,10 @@ output_disp (fragS *insn_start_frag, offsetT insn_start_off)
 		}
 
 	      p = frag_more (size);
-	      reloc_type = reloc (size, pcrel, sign, i.reloc[n]);
+	      reloc_type = reloc (size, pcrel, sign,
+				  (i.bnd_prefix != NULL
+				   || add_bnd_prefix),
+				  i.reloc[n]);
 	      if (GOT_symbol
 		  && GOT_symbol == i.op[n].disps->X_add_symbol
 		  && (((reloc_type == BFD_RELOC_32
@@ -7208,7 +7223,7 @@ output_imm (fragS *insn_start_frag, offsetT insn_start_off)
 		sign = 0;
 
 	      p = frag_more (size);
-	      reloc_type = reloc (size, 0, sign, i.reloc[n]);
+	      reloc_type = reloc (size, 0, sign, 0, i.reloc[n]);
 
 	      /*   This is tough to explain.  We end up with this one if we
 	       * have operands that look like
@@ -7302,7 +7317,7 @@ void
 x86_cons_fix_new (fragS *frag, unsigned int off, unsigned int len,
 		  expressionS *exp)
 {
-  enum bfd_reloc_code_real r = reloc (len, 0, cons_sign, got_reloc);
+  enum bfd_reloc_code_real r = reloc (len, 0, cons_sign, 0, got_reloc);
 
   got_reloc = NO_RELOC;
 
@@ -7344,7 +7359,8 @@ x86_address_bytes (void)
 static char *
 lex_got (enum bfd_reloc_code_real *rel,
 	 int *adjust,
-	 i386_operand_type *types)
+	 i386_operand_type *types,
+	 int bnd_prefix)
 {
   /* Some of the relocations depend on the size of what field is to
      be relocated.  But in our callers i386_immediate and i386_displacement
@@ -7479,6 +7495,8 @@ lex_got (enum bfd_reloc_code_real *rel,
 		*adjust = len;
 	      memcpy (tmpbuf + first, past_reloc, second);
 	      tmpbuf[first + second] = '\0';
+	      if (bnd_prefix && *rel == BFD_RELOC_X86_64_PLT32)
+		*rel = BFD_RELOC_X86_64_PLT32_BND;
 	      return tmpbuf;
 	    }
 
@@ -7610,7 +7628,7 @@ x86_cons (expressionS *exp, int size)
       int adjust = 0;
 
       save = input_line_pointer;
-      gotfree_input_line = lex_got (&got_reloc, &adjust, NULL);
+      gotfree_input_line = lex_got (&got_reloc, &adjust, NULL, 0);
       if (gotfree_input_line)
 	input_line_pointer = gotfree_input_line;
 
@@ -7838,7 +7856,9 @@ i386_immediate (char *imm_start)
   save_input_line_pointer = input_line_pointer;
   input_line_pointer = imm_start;
 
-  gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
+  gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types,
+				(i.bnd_prefix != NULL
+				 || add_bnd_prefix));
   if (gotfree_input_line)
     input_line_pointer = gotfree_input_line;
 
@@ -8095,7 +8115,9 @@ i386_displacement (char *disp_start, char *disp_end)
       *displacement_string_end = '0';
     }
 #endif
-  gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
+  gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types,
+				(i.bnd_prefix != NULL
+				 || add_bnd_prefix));
   if (gotfree_input_line)
     input_line_pointer = gotfree_input_line;
 
@@ -9055,7 +9077,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
       && (fixP->fx_r_type == BFD_RELOC_32_PCREL
 	  || fixP->fx_r_type == BFD_RELOC_64_PCREL
 	  || fixP->fx_r_type == BFD_RELOC_16_PCREL
-	  || fixP->fx_r_type == BFD_RELOC_8_PCREL)
+	  || fixP->fx_r_type == BFD_RELOC_8_PCREL
+	  || fixP->fx_r_type == BFD_RELOC_X86_64_PC32_BND)
       && !use_rela_relocations)
     {
       /* This is a hack.  There should be a better way to handle this.
@@ -9111,6 +9134,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
       {
       case BFD_RELOC_386_PLT32:
       case BFD_RELOC_X86_64_PLT32:
+      case BFD_RELOC_X86_64_PLT32_BND:
 	/* Make the jump instruction point to the address of the operand.  At
 	   runtime we merely add the offset to the actual PLT entry.  */
 	value = -4;
@@ -10182,6 +10206,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
 #endif
 
     case BFD_RELOC_X86_64_PLT32:
+    case BFD_RELOC_X86_64_PLT32_BND:
     case BFD_RELOC_X86_64_GOT32:
     case BFD_RELOC_X86_64_GOTPCREL:
     case BFD_RELOC_386_PLT32:
@@ -10242,7 +10267,10 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
 	      break;
 	    case 1: code = BFD_RELOC_8_PCREL;  break;
 	    case 2: code = BFD_RELOC_16_PCREL; break;
-	    case 4: code = BFD_RELOC_32_PCREL; break;
+	    case 4:
+	      code = (fixp->fx_r_type == BFD_RELOC_X86_64_PC32_BND
+		      ? fixp-> fx_r_type : BFD_RELOC_32_PCREL);
+	      break;
 #ifdef BFD64
 	    case 8: code = BFD_RELOC_64_PCREL; break;
 #endif
@@ -10335,6 +10363,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
 	switch (code)
 	  {
 	  case BFD_RELOC_X86_64_PLT32:
+	  case BFD_RELOC_X86_64_PLT32_BND:
 	  case BFD_RELOC_X86_64_GOT32:
 	  case BFD_RELOC_X86_64_GOTPCREL:
 	  case BFD_RELOC_X86_64_TLSGD:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 6850f17..33afa04 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2013-11-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run x86-64-mpx-branch-1 and
+	x86-64-mpx-branch-2 on 64-bit ELF targets.
+	* gas/i386/x86-64-mpx-branch-1.d: New file.
+	* gas/i386/x86-64-mpx-branch-1.s: Likewise.
+	* gas/i386/x86-64-mpx-branch-2.d: Likewise.
+	* gas/i386/x86-64-mpx-branch-2.s: Likewise.
+
 2013-11-15  Yufeng Zhang  <yufeng.zhang@arm.com>
 
 	* gas/aarch64/diagnostic.s: Add tests.
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index ce77fef..1fb2795 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -589,6 +589,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
 	run_dump_test "k1om"
 	run_dump_test "x86-64-localpic"
 	run_dump_test "debug1"
+	run_dump_test "x86-64-mpx-branch-1"
+	run_dump_test "x86-64-mpx-branch-2"
 
 	run_dump_test "x86-64-dw2-compress-2"
 
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d b/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
new file mode 100644
index 0000000..5edb1c7
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
@@ -0,0 +1,28 @@
+#as: -J
+#objdump: -dwr
+#name: x86-64 MPX branch
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo1-0xc>:
+[ 	]*[a-f0-9]+:	f2 e8 00 00 00 00    	bnd callq 6 <foo1-0x6>	2: R_X86_64_PC32_BND	\*ABS\*\+0x10003c
+[ 	]*[a-f0-9]+:	f2 e9 00 00 00 00    	bnd jmpq c <foo1>	8: R_X86_64_PC32_BND	\*ABS\*\+0x10003c
+
+0+c <foo1>:
+[ 	]*[a-f0-9]+:	f2 eb fd             	bnd jmp c <foo1>
+[ 	]*[a-f0-9]+:	f2 72 fa             	bnd jb c <foo1>
+[ 	]*[a-f0-9]+:	f2 e8 f4 ff ff ff    	bnd callq c <foo1>
+[ 	]*[a-f0-9]+:	f2 eb 09             	bnd jmp 24 <foo2>
+[ 	]*[a-f0-9]+:	f2 72 06             	bnd jb 24 <foo2>
+[ 	]*[a-f0-9]+:	f2 e8 00 00 00 00    	bnd callq 24 <foo2>
+
+0+24 <foo2>:
+[ 	]*[a-f0-9]+:	f2 e9 00 00 00 00    	bnd jmpq 2a <foo2\+0x6>	26: R_X86_64_PC32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 0f 82 00 00 00 00 	bnd jb 31 <foo2\+0xd>	2d: R_X86_64_PC32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 e8 00 00 00 00    	bnd callq 37 <foo2\+0x13>	33: R_X86_64_PC32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 e9 00 00 00 00    	bnd jmpq 3d <foo2\+0x19>	39: R_X86_64_PLT32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 0f 82 00 00 00 00 	bnd jb 44 <foo2\+0x20>	40: R_X86_64_PLT32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 e8 00 00 00 00    	bnd callq 4a <foo2\+0x26>	46: R_X86_64_PLT32_BND	foo-0x4
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-branch-1.s b/gas/testsuite/gas/i386/x86-64-mpx-branch-1.s
new file mode 100644
index 0000000..3cdb109
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-branch-1.s
@@ -0,0 +1,18 @@
+	.text
+	bnd call	0x100040
+	bnd jmp		0x100040
+
+foo1:
+	bnd jmp		foo1
+	bnd jb		foo1
+	bnd call	foo1
+	bnd jmp		foo2
+	bnd jb		foo2
+	bnd call	foo2
+foo2:
+	bnd jmp		foo
+	bnd jb		foo
+	bnd call 	foo
+	bnd jmp		foo@PLT
+	bnd jb		foo@PLT
+	bnd call	foo@plt
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-branch-2.d b/gas/testsuite/gas/i386/x86-64-mpx-branch-2.d
new file mode 100644
index 0000000..86fb360
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-branch-2.d
@@ -0,0 +1,28 @@
+#as: -J -madd-bnd-prefix
+#objdump: -dwr
+#name: x86-64 branch with BND prefix
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo1-0xc>:
+[ 	]*[a-f0-9]+:	f2 e8 00 00 00 00    	bnd callq 6 <foo1-0x6>	2: R_X86_64_PC32_BND	\*ABS\*\+0x10003c
+[ 	]*[a-f0-9]+:	f2 e9 00 00 00 00    	bnd jmpq c <foo1>	8: R_X86_64_PC32_BND	\*ABS\*\+0x10003c
+
+0+c <foo1>:
+[ 	]*[a-f0-9]+:	f2 eb fd             	bnd jmp c <foo1>
+[ 	]*[a-f0-9]+:	f2 72 fa             	bnd jb c <foo1>
+[ 	]*[a-f0-9]+:	f2 e8 f4 ff ff ff    	bnd callq c <foo1>
+[ 	]*[a-f0-9]+:	f2 eb 09             	bnd jmp 24 <foo2>
+[ 	]*[a-f0-9]+:	f2 72 06             	bnd jb 24 <foo2>
+[ 	]*[a-f0-9]+:	f2 e8 00 00 00 00    	bnd callq 24 <foo2>
+
+0+24 <foo2>:
+[ 	]*[a-f0-9]+:	f2 e9 00 00 00 00    	bnd jmpq 2a <foo2\+0x6>	26: R_X86_64_PC32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 0f 82 00 00 00 00 	bnd jb 31 <foo2\+0xd>	2d: R_X86_64_PC32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 e8 00 00 00 00    	bnd callq 37 <foo2\+0x13>	33: R_X86_64_PC32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 e9 00 00 00 00    	bnd jmpq 3d <foo2\+0x19>	39: R_X86_64_PLT32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 0f 82 00 00 00 00 	bnd jb 44 <foo2\+0x20>	40: R_X86_64_PLT32_BND	foo-0x4
+[ 	]*[a-f0-9]+:	f2 e8 00 00 00 00    	bnd callq 4a <foo2\+0x26>	46: R_X86_64_PLT32_BND	foo-0x4
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-branch-2.s b/gas/testsuite/gas/i386/x86-64-mpx-branch-2.s
new file mode 100644
index 0000000..5fe9088
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-branch-2.s
@@ -0,0 +1,18 @@
+	.text
+	call	0x100040
+	jmp	0x100040
+
+foo1:
+	jmp	foo1
+	jb	foo1
+	call	foo1
+	jmp	foo2
+	jb	foo2
+	call	foo2
+foo2:
+	jmp	foo
+	jb	foo
+	call 	foo
+	jmp	foo@PLT
+	jb	foo@PLT
+	call	foo@plt