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| author | Alan Modra <amodra@gmail.com> | 2016-09-29 15:12:47 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2016-09-29 15:12:47 +0930 |
| commit | a5721ba270ddf860e0e5a45bba456214e8eac2be (patch) | |
| tree | d859bdad489788b9173c41728cc490f7ffcd20b5 /gas | |
| parent | b82317dd347991288e4cca4772e951c672fca8cc (diff) | |
| download | gdb-a5721ba270ddf860e0e5a45bba456214e8eac2be.zip gdb-a5721ba270ddf860e0e5a45bba456214e8eac2be.tar.gz gdb-a5721ba270ddf860e0e5a45bba456214e8eac2be.tar.bz2 | |
Disallow 3-operand cmp[l][i] for ppc64
cmp[l][o] get an optional L field only when generating 32-bit code.
dcbf, tlbie and tlbiel keep their optional L field, ditto for R field
of tbegin. cmprb, tsr., wlcr[all] and mtsle all change to a
compulsory L field.
L field of dcbf and wclr is 2 bits.
PR 20641
include/
* opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
opcodes/
* ppc-opc.c (L): Make compulsory.
(LOPT): New, optional form of L.
(HTM_R): Define as LOPT.
(L0, L1): Delete.
(L32OPT): New, optional for 32-bit L.
(L2OPT): New, 2-bit L for dcbf.
(SVC_LEC): Update.
(L2): Define.
(insert_l0, extract_l0, insert_l1, extract_l2): Delete.
(powerpc_opcodes <cmpli, cmpi, cmpl, cmp>): Use L32OPT.
<dcbf>: Use L2OPT.
<tlbiel, tlbie>: Use LOPT.
<wclr, wclrall>: Use L2.
gas/
* config/tc-ppc.c (md_assemble): Handle PPC_OPERAND_OPTIONAL32.
* testsuite/gas/ppc/power8.s: Provide tbegin. operand.
* testsuite/gas/ppc/power9.d: Update cmprb disassembly.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-ppc.c | 4 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/power8.s | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/power9.d | 4 |
4 files changed, 12 insertions, 4 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index d499099..e4db0f0 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2016-09-29 Alan Modra <amodra@gmail.com> + + * config/tc-ppc.c (md_assemble): Handle PPC_OPERAND_OPTIONAL32. + * testsuite/gas/ppc/power8.s: Provide tbegin. operand. + * testsuite/gas/ppc/power9.d: Update cmprb disassembly. + 2016-09-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-xtensa.c (xg_reverse_shift_count): Pass cnt_arg instead of diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index d2b5316..5c7b09f 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -2695,7 +2695,8 @@ md_assemble (char *str) const struct powerpc_operand *operand; operand = &powerpc_operands[*opindex_ptr]; - if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) + if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 + && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)) { unsigned int opcount; unsigned int num_operands_expected; @@ -2765,6 +2766,7 @@ md_assemble (char *str) /* If this is an optional operand, and we are skipping it, just insert a zero. */ if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 + && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64) && skip_optional) { long val = ppc_optional_operand_value (operand); diff --git a/gas/testsuite/gas/ppc/power8.s b/gas/testsuite/gas/ppc/power8.s index 728caae..857bda2 100644 --- a/gas/testsuite/gas/ppc/power8.s +++ b/gas/testsuite/gas/ppc/power8.s @@ -5,7 +5,7 @@ power8: tabortdc. 20,11,10 tabortwci. 17,10,-13 tabortdci. 29,3,-5 - tbegin. + tbegin. 0 tcheck 7 tend. 0 tend. diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d index 31e4530..6f2f53a 100644 --- a/gas/testsuite/gas/ppc/power9.d +++ b/gas/testsuite/gas/ppc/power9.d @@ -274,8 +274,8 @@ Disassembly of section \.text: .*: (f3 89 ef 6f|6f ef 89 f3) xvxsigsp vs60,vs61 .*: (7c 06 39 c0|c0 39 06 7c) cmpeqb cr0,r6,r7 .*: (7f 86 39 c0|c0 39 86 7f) cmpeqb cr7,r6,r7 -.*: (7c 08 49 80|80 49 08 7c) cmprb cr0,r8,r9 -.*: (7f 88 49 80|80 49 88 7f) cmprb cr7,r8,r9 +.*: (7c 08 49 80|80 49 08 7c) cmprb cr0,0,r8,r9 +.*: (7f 88 49 80|80 49 88 7f) cmprb cr7,0,r8,r9 .*: (7c 28 49 80|80 49 28 7c) cmprb cr0,1,r8,r9 .*: (7f a8 49 80|80 49 a8 7f) cmprb cr7,1,r8,r9 .*: (7d e0 01 00|00 01 e0 7d) setb r15,cr0 |