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authorChenghua Xu <paul.hua.gm@gmail.com>2018-08-29 20:13:00 +0800
committerChenghua Xu <paul.hua.gm@gmail.com>2018-08-29 20:32:30 +0800
commitac8cb70f3690b4eace1325c7ff918dce9073da7c (patch)
tree83600872c07a022dcea1d3097dba01eafd5fa197 /gas
parenta693765e23934996abbe4e44c4ba28eabdece4f9 (diff)
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[MIPS] Add Loongson 3A1000 proccessor support.
bfd/ * archures.c (bfd_architecture): Rename bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (enum I_xxx): Likewise. (arch_info_struct): Likewise. * elfxx-mips.c (_bfd_elf_mips_mach): Likewise. (mips_set_isa_flags): Likewise. (mips_mach_extensions): Likewise. (bfd_mips_isa_ext_mach): Likewise. (bfd_mips_isa_ext): Likewise. (print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A. binutils/ * NEWS: Mention Loongson 3A1000 proccessor support. * readelf.c (get_machine_flags): Rename loongson-3a to gs464. (print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A. elfcpp/ * mips.c (EF_MIPS_MACH): Rename E_MIPS_MACH_LS3A to E_MIPS_MACH_GS464. gas/ * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Rename CPU_LOONGSON_3A to CPU_GS464. (mips_cpu_info_table): Add gs464 descriptors, Keep loongson3a as an alias of gs464 for compatibility. * doc/as.texi (march table): Rename loongson3a to gs464. * testsuite/gas/mips/loongson-3a-mmi.d: Set "ISA Extension" flag to None. gold/ * mips.cc (Mips_mach, add_machine_extensions, elf_mips_mach): Rename loongson3a to gs464. (mips_isa_ext_mach, mips_isa_ext): Delete loongson3a. (infer_abiflags): Use ases instead of isa_ext for infer ABI flags. (elf_mips_mach_name): Rename loongson3a to gs464. include/ * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to E_MIPS_MACH_GS464. (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A. * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A. (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464. * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp: Rename loongson3a to gs464. opcodes/ * mips-dis.c (mips_arch_choices): Add gs464 descriptors, Keep loongson3a as an alias of gs464 for compatibility. * mips-opc.c (mips_opcodes): Change Comments.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog10
-rw-r--r--gas/config/tc-mips.c7
-rw-r--r--gas/doc/c-mips.texi2
-rw-r--r--gas/testsuite/gas/mips/loongson-3a-mmi.d2
-rw-r--r--gas/testsuite/gas/mips/mips.exp4
5 files changed, 19 insertions, 6 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 34efeb5..f5e0bad 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,15 @@
2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+ * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Rename
+ CPU_LOONGSON_3A to CPU_GS464.
+ (mips_cpu_info_table): Add gs464 descriptors, Keep
+ loongson3a as an alias of gs464 for compatibility.
+ * doc/as.texi (march table): Rename loongson3a to gs464.
+ * testsuite/gas/mips/loongson-3a-mmi.d: Set "ISA Extension"
+ flag to None.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
* NEWS: Mention Loongson EXTensions R2 (EXT2) support.
* config/tc-mips.c (options): Add OPTION_LOONGSON_EXT2 and
OPTION_NO_LOONGSON_EXT2.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index e60cf4e..0847875 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -422,7 +422,7 @@ static int mips_32bitmode = 0;
|| (ISA) == ISA_MIPS64R5 \
|| (ISA) == ISA_MIPS64R6 \
|| (CPU) == CPU_R5900) \
- && (CPU) != CPU_LOONGSON_3A)
+ && (CPU) != CPU_GS464)
/* Return true if ISA supports move to/from high part of a 64-bit
floating-point register. */
@@ -19809,8 +19809,11 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
/* MIPS 64 Release 2 */
/* Loongson CPU core */
+ /* -march=loongson3a is an alias of -march=gs464 for compatibility */
{ "loongson3a", 0, ASE_LOONGSON_MMI | ASE_LOONGSON_CAM | ASE_LOONGSON_EXT,
- ISA_MIPS64R2, CPU_LOONGSON_3A },
+ ISA_MIPS64R2, CPU_GS464 },
+ { "gs464", 0, ASE_LOONGSON_MMI | ASE_LOONGSON_CAM | ASE_LOONGSON_EXT,
+ ISA_MIPS64R2, CPU_GS464 },
/* Cavium Networks Octeon CPU core */
{ "octeon", 0, 0, ISA_MIPS64R2, CPU_OCTEON },
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index f74e10f..2152164 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -437,7 +437,7 @@ i6400,
p6600,
loongson2e,
loongson2f,
-loongson3a,
+gs464,
octeon,
octeon+,
octeon2,
diff --git a/gas/testsuite/gas/mips/loongson-3a-mmi.d b/gas/testsuite/gas/mips/loongson-3a-mmi.d
index 8319a7d..3a52c5a 100644
--- a/gas/testsuite/gas/mips/loongson-3a-mmi.d
+++ b/gas/testsuite/gas/mips/loongson-3a-mmi.d
@@ -12,7 +12,7 @@ GPR size: .*
CPR1 size: .*
CPR2 size: .*
FP ABI: .*
-ISA Extension: Loongson 3A
+ISA Extension: None
ASEs:
Loongson MMI ASE
Loongson CAM ASE
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index cb1da9a..0da442c 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1394,8 +1394,8 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "loongson-2f-mmi"
run_dump_test "loongson-3a-mmi"
- run_dump_test "loongson-cam"
- run_dump_test "loongson-ext2"
+ run_dump_test_arches "loongson-cam" [mips_arch_list_matching gs464]
+ run_dump_test_arches "loongson-ext2" [mips_arch_list_matching gs464]
if { $has_newabi } {
run_dump_test_arches "octeon" [mips_arch_list_matching octeon]