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authorH.J. Lu <hjl.tools@gmail.com>2007-08-28 17:36:34 +0000
committerH.J. Lu <hjl.tools@gmail.com>2007-08-28 17:36:34 +0000
commitd9a5e5e5c91086a8dd66174a7ebff52c00efe79e (patch)
treebd7ab2e401e44e7ee2b191527d4658d507c21533 /gas
parentd5ce5596bf611b65e4fc93b4e90df67359f4cba5 (diff)
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gas/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_suffix): Handle cmpxchg8b in Intel mode. gas/testsuite/ 2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/mem.s: New. Add tests for instructions with one memory operand. * gas/i386/x86-64-mem.s: Likewise. * gas/i386/mem-intel.d: Updated. * gas/i386/mem.d: Likewise. * gas/i386/x86-64-mem-intel.d: Likewise. * gas/i386/x86-64-mem.d: Likewise. opcodes/ 2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (Md): New. (grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use Md on ldmxcsr and stmxcsr. Use b_mode on clflush. (OP_0fae): Clear bytemode for sfence.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog9
-rw-r--r--gas/config/tc-i386.c16
-rw-r--r--gas/testsuite/ChangeLog13
-rw-r--r--gas/testsuite/gas/i386/i386.exp4
-rw-r--r--gas/testsuite/gas/i386/mem-intel.d41
-rw-r--r--gas/testsuite/gas/i386/mem.d39
-rw-r--r--gas/testsuite/gas/i386/mem.s39
-rw-r--r--gas/testsuite/gas/i386/x86-64-mem-intel.d43
-rw-r--r--gas/testsuite/gas/i386/x86-64-mem.d42
-rw-r--r--gas/testsuite/gas/i386/x86-64-mem.s41
10 files changed, 279 insertions, 8 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 71276d4..12d3e5c 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_suffix): Handle cmpxchg8b in
+ Intel mode.
+
2007-08-28 Nathan Sidwell <nathan@codesourcery.com>
* config/tc-m68k.c (mcf52235_ctrl): Add cache registers.
@@ -11,7 +16,7 @@
(m68k_cpus): Define 51QE cpu.
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
- Joseph Myers <joseph@codesourcery.com>
+ Joseph Myers <joseph@codesourcery.com>
* as.c (main): Flush stderr before printing listings to ensure
consistent output order across platforms.
@@ -21,7 +26,7 @@
* configure.tgt: Add support for i[3-7]86-*-dragonfly*.
2007-08-24 Joseph Myers <joseph@codesourcery.com>
- Paul Brook <paul@codesourcery.com>
+ Paul Brook <paul@codesourcery.com>
* remap.c: New.
* as.h (remap_debug_filename, add_debug_prefix_map): Declare.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 16376dc..0f6396f 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3032,11 +3032,17 @@ process_suffix (void)
&& (i.tm.opcode_modifier & NoRex64) == 0)
{
/* Special case for xchg %rax,%rax. It is NOP and doesn't
- need rex64. */
- if (i.operands != 2
- || i.types [0] != (Acc | Reg64)
- || i.types [1] != (Acc | Reg64)
- || i.tm.base_opcode != 0x90)
+ need rex64. cmpxchg8b is also a special case. */
+ if (! (i.operands == 2
+ && i.tm.base_opcode == 0x90
+ && i.tm.extension_opcode == None
+ && i.types [0] == (Acc | Reg64)
+ && i.types [1] == (Acc | Reg64))
+ && ! (i.operands == 1
+ && i.tm.base_opcode == 0xfc7
+ && i.tm.extension_opcode == 1
+ && (i.types [0] & Reg) == 0
+ && (i.types [0] & AnyMem) != 0))
i.rex |= REX_W;
}
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 1d196d0..628b2d9 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,16 @@
+2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/mem.s: New. Add tests for instructions with one
+ memory operand.
+ * gas/i386/x86-64-mem.s: Likewise.
+
+ * gas/i386/mem-intel.d: Updated.
+ * gas/i386/mem.d: Likewise.
+ * gas/i386/x86-64-mem-intel.d: Likewise.
+ * gas/i386/x86-64-mem.d: Likewise.
+
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
- Joseph Myers <joseph@codesourcery.com>
+ Joseph Myers <joseph@codesourcery.com>
* lib/gas-defs.exp (gas_version): Use remote_* functions instead
of exec.
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index f68ab81..be5e677 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -88,6 +88,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_list_test "inval-crc32" "-al"
run_dump_test "simd"
run_dump_test "simd-intel"
+ run_dump_test "mem"
+ run_dump_test "mem-intel"
# These tests require support for 8 and 16 bit relocs,
# so we only run them for ELF and COFF targets.
@@ -187,6 +189,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_list_test "x86-64-inval-crc32" "-al"
run_dump_test "x86-64-simd"
run_dump_test "x86-64-simd-intel"
+ run_dump_test "x86-64-mem"
+ run_dump_test "x86-64-mem-intel"
if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/mem-intel.d b/gas/testsuite/gas/i386/mem-intel.d
new file mode 100644
index 0000000..10968f1
--- /dev/null
+++ b/gas/testsuite/gas/i386/mem-intel.d
@@ -0,0 +1,41 @@
+#source: mem.s
+#as: -J
+#objdump: -dw -Mintel
+#name: i386 mem (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 0f 01 06 sgdtd \[esi\]
+[ ]*[a-f0-9]+: 0f 01 0e sidtd \[esi\]
+[ ]*[a-f0-9]+: 0f 01 16 lgdtd \[esi\]
+[ ]*[a-f0-9]+: 0f 01 1e lidtd \[esi\]
+[ ]*[a-f0-9]+: 0f 01 3e invlpg \[esi\]
+[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f ae 06 fxsave \[esi\]
+[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[esi\]
+[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[esi\]
+[ ]*[a-f0-9]+: 0f 01 06 sgdtd \[esi\]
+[ ]*[a-f0-9]+: 0f 01 0e sidtd \[esi\]
+[ ]*[a-f0-9]+: 0f 01 16 lgdtd \[esi\]
+[ ]*[a-f0-9]+: 0f 01 1e lidtd \[esi\]
+[ ]*[a-f0-9]+: 0f 01 3e invlpg \[esi\]
+[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f ae 06 fxsave \[esi\]
+[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[esi\]
+[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[esi\]
+[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[esi\]
+#pass
diff --git a/gas/testsuite/gas/i386/mem.d b/gas/testsuite/gas/i386/mem.d
new file mode 100644
index 0000000..312d6bd
--- /dev/null
+++ b/gas/testsuite/gas/i386/mem.d
@@ -0,0 +1,39 @@
+#objdump: -dw
+#name: i386 mem
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 0f 01 06 sgdtl \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 0e sidtl \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 16 lgdtl \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 1e lidtl \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%esi\)
+[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%esi\)
+[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%esi\)
+[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%esi\)
+[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%esi\)
+[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 3e clflush \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 06 sgdtl \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 0e sidtl \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 16 lgdtl \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 1e lidtl \(%esi\)
+[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%esi\)
+[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%esi\)
+[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%esi\)
+[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%esi\)
+[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%esi\)
+[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%esi\)
+[ ]*[a-f0-9]+: 0f ae 3e clflush \(%esi\)
+#pass
diff --git a/gas/testsuite/gas/i386/mem.s b/gas/testsuite/gas/i386/mem.s
new file mode 100644
index 0000000..7895beb2
--- /dev/null
+++ b/gas/testsuite/gas/i386/mem.s
@@ -0,0 +1,39 @@
+# Check instructions with one memory operand
+
+ .text
+_start:
+
+sgdt (%esi)
+sidt (%esi)
+lgdt (%esi)
+lidt (%esi)
+invlpg (%esi)
+cmpxchg8b (%esi)
+vmptrld (%esi)
+vmclear (%esi)
+vmxon (%esi)
+vmptrst (%esi)
+fxsave (%esi)
+fxrstor (%esi)
+ldmxcsr (%esi)
+stmxcsr (%esi)
+clflush (%esi)
+
+.intel_syntax noprefix
+sgdt [esi]
+sidt [esi]
+lgdt [esi]
+lidt [esi]
+invlpg [esi]
+cmpxchg8b qword ptr [esi]
+vmptrld qword ptr [esi]
+vmclear qword ptr [esi]
+vmxon qword ptr [esi]
+vmptrst qword ptr [esi]
+fxsave [esi]
+fxrstor [esi]
+ldmxcsr dword ptr [esi]
+stmxcsr dword ptr [esi]
+clflush byte ptr [esi]
+
+.p2align 4,0
diff --git a/gas/testsuite/gas/i386/x86-64-mem-intel.d b/gas/testsuite/gas/i386/x86-64-mem-intel.d
new file mode 100644
index 0000000..7d0eb97
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mem-intel.d
@@ -0,0 +1,43 @@
+#source: x86-64-mem.s
+#as: -J
+#objdump: -dw -Mintel
+#name: x86-64 mem (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 3e invlpg \[rsi\]
+[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 3e invlpg \[rsi\]
+[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\]
+[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-mem.d b/gas/testsuite/gas/i386/x86-64-mem.d
new file mode 100644
index 0000000..863b6a3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mem.d
@@ -0,0 +1,42 @@
+#as: -J
+#objdump: -dw
+#name: x86-64 mem
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 0f 01 06 sgdt \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 0e sidt \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 16 lgdt \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 1e lidt \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%rsi\)
+[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%rsi\)
+[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
+[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%rsi\)
+[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%rsi\)
+[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%rsi\)
+[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 06 sgdt \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 0e sidt \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 16 lgdt \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 1e lidt \(%rsi\)
+[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%rsi\)
+[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%rsi\)
+[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
+[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%rsi\)
+[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%rsi\)
+[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%rsi\)
+[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
+[ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-mem.s b/gas/testsuite/gas/i386/x86-64-mem.s
new file mode 100644
index 0000000..7edba80
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mem.s
@@ -0,0 +1,41 @@
+# Check 64bit instructions with one memory operand
+
+ .text
+_start:
+
+sgdt (%rsi)
+sidt (%rsi)
+lgdt (%rsi)
+lidt (%rsi)
+invlpg (%rsi)
+cmpxchg8b (%rsi)
+cmpxchg16b (%rsi)
+vmptrld (%rsi)
+vmclear (%rsi)
+vmxon (%rsi)
+vmptrst (%rsi)
+fxsave (%rsi)
+fxrstor (%rsi)
+ldmxcsr (%rsi)
+stmxcsr (%rsi)
+clflush (%rsi)
+
+.intel_syntax noprefix
+sgdt [rsi]
+sidt [rsi]
+lgdt [rsi]
+lidt [rsi]
+invlpg [rsi]
+cmpxchg8b qword ptr [rsi]
+cmpxchg16b oword ptr [rsi]
+vmptrld qword ptr [rsi]
+vmclear qword ptr [rsi]
+vmxon qword ptr [rsi]
+vmptrst qword ptr [rsi]
+fxsave [rsi]
+fxrstor [rsi]
+ldmxcsr dword ptr [rsi]
+stmxcsr dword ptr [rsi]
+clflush byte ptr [rsi]
+
+.p2align 4,0