* config/tc-mips.c (append_insn, mips_emit_delays): Extend -mfix-vr4120

	to cope with VR4181A errata MD(1) and MD(4).

8 files changed, 367 insertions, 159 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f51be5b..5ecda6f 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2004-05-07  Richard Sandiford  <rsandifo@redhat.com>
+
+	* config/tc-mips.c (append_insn, mips_emit_delays): Extend -mfix-vr4120
+	to cope with VR4181A errata MD(1) and MD(4).
+
 2004-05-07  Brian Ford  <ford@vss.fsi.com>
 
 	* NEWS: Mention .secrel32 for pe[i]-i386.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 6f0db09..8d380e9 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1858,38 +1858,49 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
 	  int min_nops = 0;
 	  const char *pn = prev_insn.insn_mo->name;
 	  const char *tn = ip->insn_mo->name;
-	  if (strncmp(pn, "macc", 4) == 0
-	      || strncmp(pn, "dmacc", 5) == 0)
+	  if (strncmp (pn, "macc", 4) == 0
+	      || strncmp (pn, "dmacc", 5) == 0)
 	    {
 	      /* Errata 21 - [D]DIV[U] after [D]MACC */
 	      if (strstr (tn, "div"))
-		{
-		  min_nops = 1;
-		}
+		min_nops = 1;
 
-	      /* Errata 23 - Continuous DMULT[U]/DMACC instructions */
-	      if (pn[0] == 'd' /* dmacc */
-		  && (strncmp(tn, "dmult", 5) == 0
-		      || strncmp(tn, "dmacc", 5) == 0))
-		{
-		  min_nops = 1;
-		}
+	      /* VR4181A errata MD(1): "If a MULT, MULTU, DMULT or DMULTU
+		 instruction is executed immediately after a MACC or
+		 DMACC instruction, the result of [either instruction]
+		 is incorrect."  */
+	      if (strncmp (tn, "mult", 4) == 0
+		  || strncmp (tn, "dmult", 5) == 0)
+		min_nops = 1;
+
+	      /* Errata 23 - Continuous DMULT[U]/DMACC instructions.
+		 Applies on top of VR4181A MD(1) errata.  */
+	      if (pn[0] == 'd' && strncmp (tn, "dmacc", 5) == 0)
+		min_nops = 1;
 
 	      /* Errata 24 - MT{LO,HI} after [D]MACC */
 	      if (strcmp (tn, "mtlo") == 0
 		  || strcmp (tn, "mthi") == 0)
-		{
-		  min_nops = 1;
-		}
-
+		min_nops = 1;
 	    }
-	  else if (strncmp(pn, "dmult", 5) == 0
-		   && (strncmp(tn, "dmult", 5) == 0
-		       || strncmp(tn, "dmacc", 5) == 0))
+	  else if (strncmp (pn, "dmult", 5) == 0
+		   && (strncmp (tn, "dmult", 5) == 0
+		       || strncmp (tn, "dmacc", 5) == 0))
 	    {
 	      /* Here is the rest of errata 23.  */
 	      min_nops = 1;
 	    }
+	  else if ((strncmp (pn, "dmult", 5) == 0 || strstr (pn, "div"))
+		   && (strncmp (tn, "macc", 4) == 0
+		       || strncmp (tn, "dmacc", 5) == 0))
+	    {
+	      /* VR4181A errata MD(4): "If a MACC or DMACC instruction is
+		 executed immediately after a DMULT, DMULTU, DIV, DIVU,
+		 DDIV or DDIVU instruction, the result of the MACC or
+		 DMACC instruction is incorrect.".  This partly overlaps
+		 the workaround for errata 23.  */
+	      min_nops = 1;
+	    }
 	  if (nops < min_nops)
 	    nops = min_nops;
 	}
@@ -2827,12 +2838,11 @@ mips_emit_delays (bfd_boolean insns)
 	{
 	  int min_nops = 0;
 	  const char *pn = prev_insn.insn_mo->name;
-	  if (strncmp(pn, "macc", 4) == 0
-	      || strncmp(pn, "dmacc", 5) == 0
-	      || strncmp(pn, "dmult", 5) == 0)
-	    {
-	      min_nops = 1;
-	    }
+	  if (strncmp (pn, "macc", 4) == 0
+	      || strncmp (pn, "dmacc", 5) == 0
+	      || strncmp (pn, "dmult", 5) == 0
+	      || strstr (pn, "div"))
+	    min_nops = 1;
 	  if (nops < min_nops)
 	    nops = min_nops;
 	}
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d15dc588..4e7af29 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2004-05-07  Richard Sandiford  <rsandifo@redhat.com>
+
+	* gas/mips/vr4122.[sd]: Rename to...
+	* gas/mips/vr4120-2.[sd]: ...and add tests for VR4181A errata
+	MD(1) and MD(4).
+	* gas/mips/mips.exp: Update accordingly.
+
 2004-05-05  Alexandre Oliva  <aoliva@redhat.com>
 
 	* gas/frv/reloc1.d: Match elf32-frvfdpic as well.
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index c1dd7a7..a4a0191 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -537,7 +537,7 @@ if { [istarget mips*-*-*] } then {
     run_dump_test "mips4100"
     run_dump_test "vr4111"
     run_dump_test "vr4120"
-    run_dump_test "vr4122"
+    run_dump_test "vr4120-2"
     run_dump_test "vr5400"
     run_dump_test "vr5500"
     run_dump_test "rm7000"
diff --git a/gas/testsuite/gas/mips/vr4120-2.d b/gas/testsuite/gas/mips/vr4120-2.d
new file mode 100644
index 0000000..ec6efd9
--- /dev/null
+++ b/gas/testsuite/gas/mips/vr4120-2.d
@@ -0,0 +1,172 @@
+#objdump: -dz --prefix-addresses -m mips:4120
+#as: -32 -march=vr4120 -mfix-vr4120
+#name: MIPS vr4120 workarounds
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> div	zero,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> div	zero,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> divu	zero,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> divu	zero,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> ddiv	zero,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> ddiv	zero,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> ddivu	zero,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> ddivu	zero,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> dmult	a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmult	a2,a3
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> dmultu	a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmultu	a2,a3
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> dmacc	a2,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> dmult	a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmacc	a2,a3,t0
+.* <[^>]*> or	a0,a0,a1
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> mtlo	a3
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> mtlo	a3
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> mthi	a3
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> mthi	a3
+#
+# vr4181a_md1:
+#
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> mult	a0,a1
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> multu	a0,a1
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> dmult	a0,a1
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> dmultu	a0,a1
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> mult	a0,a1
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> multu	a0,a1
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> dmult	a0,a1
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> nop
+.* <[^>]*> dmultu	a0,a1
+.* <[^>]*> or	a0,a0,a1
+#
+# vr4181a_md4:
+#
+.* <[^>]*> dmult	a0,a1
+.* <[^>]*> nop
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> dmultu	a0,a1
+.* <[^>]*> nop
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> div	zero,a0,a1
+.* <[^>]*> nop
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> divu	zero,a0,a1
+.* <[^>]*> nop
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> ddiv	zero,a0,a1
+.* <[^>]*> nop
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> ddivu	zero,a0,a1
+.* <[^>]*> nop
+.* <[^>]*> macc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> dmult	a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> dmultu	a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> div	zero,a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> divu	zero,a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> ddiv	zero,a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#
+.* <[^>]*> ddivu	zero,a0,a1
+.* <[^>]*> nop
+.* <[^>]*> dmacc	a0,a1,a2
+.* <[^>]*> or	a0,a0,a1
+#...
diff --git a/gas/testsuite/gas/mips/vr4120-2.s b/gas/testsuite/gas/mips/vr4120-2.s
new file mode 100644
index 0000000..1e5d606
--- /dev/null
+++ b/gas/testsuite/gas/mips/vr4120-2.s
@@ -0,0 +1,147 @@
+# Test workarounds selected by -mfix-vr4120.
+# Note that we only work around bugs gcc may generate.
+
+r21:
+	macc	$4,$5,$6
+	div	$0,$7,$8
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	div	$0,$7,$8
+	or	$4,$5
+
+	macc	$4,$5,$6
+	divu	$0,$7,$8
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	divu	$0,$7,$8
+	or	$4,$5
+
+	macc	$4,$5,$6
+	ddiv	$0,$7,$8
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	ddiv	$0,$7,$8
+	or	$4,$5
+
+	macc	$4,$5,$6
+	ddivu	$0,$7,$8
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	ddivu	$0,$7,$8
+	or	$4,$5
+
+r23:
+	dmult	$4,$5
+	dmult	$6,$7
+	or	$4,$5
+
+	dmultu	$4,$5
+	dmultu	$6,$7
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	dmacc	$6,$7,$8
+	or	$4,$5
+
+	dmult	$4,$5
+	dmacc	$6,$7,$8
+	or	$4,$5
+
+r24:
+	macc	$4,$5,$6
+	mtlo	$7
+
+	dmacc	$4,$5,$6
+	mtlo	$7
+
+	macc	$4,$5,$6
+	mthi	$7
+
+	dmacc	$4,$5,$6
+	mthi	$7
+
+vr4181a_md1:
+	macc	$4,$5,$6
+	mult	$4,$5
+	or	$4,$5
+
+	macc	$4,$5,$6
+	multu	$4,$5
+	or	$4,$5
+
+	macc	$4,$5,$6
+	dmult	$4,$5
+	or	$4,$5
+
+	macc	$4,$5,$6
+	dmultu	$4,$5
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	mult	$4,$5
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	multu	$4,$5
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	dmult	$4,$5
+	or	$4,$5
+
+	dmacc	$4,$5,$6
+	dmultu	$4,$5
+	or	$4,$5
+
+vr4181a_md4:
+	dmult	$4,$5
+	macc	$4,$5,$6
+	or	$4,$5
+
+	dmultu	$4,$5
+	macc	$4,$5,$6
+	or	$4,$5
+
+	div	$0,$4,$5
+	macc	$4,$5,$6
+	or	$4,$5
+
+	divu	$0,$4,$5
+	macc	$4,$5,$6
+	or	$4,$5
+
+	ddiv	$0,$4,$5
+	macc	$4,$5,$6
+	or	$4,$5
+
+	ddivu	$0,$4,$5
+	macc	$4,$5,$6
+	or	$4,$5
+
+	dmult	$4,$5
+	dmacc	$4,$5,$6
+	or	$4,$5
+
+	dmultu	$4,$5
+	dmacc	$4,$5,$6
+	or	$4,$5
+
+	div	$0,$4,$5
+	dmacc	$4,$5,$6
+	or	$4,$5
+
+	divu	$0,$4,$5
+	dmacc	$4,$5,$6
+	or	$4,$5
+
+	ddiv	$0,$4,$5
+	dmacc	$4,$5,$6
+	or	$4,$5
+
+	ddivu	$0,$4,$5
+	dmacc	$4,$5,$6
+	or	$4,$5
diff --git a/gas/testsuite/gas/mips/vr4122.d b/gas/testsuite/gas/mips/vr4122.d
deleted file mode 100644
index 99e0043..0000000
--- a/gas/testsuite/gas/mips/vr4122.d
+++ /dev/null
@@ -1,68 +0,0 @@
-#objdump: -dz --prefix-addresses -m mips:4120
-#as: -32 -march=vr4120 -mfix-vr4120
-#name: MIPS vr4120 workarounds
-
-.*: +file format .*mips.*
-
-Disassembly of section .text:
-0+0000 <[^>]*> macc	a0,a1,a2
-0+0004 <[^>]*> nop
-0+0008 <[^>]*> div	zero,a3,t0
-0+000c <[^>]*> or	a0,a0,a1
-0+0010 <[^>]*> dmacc	a0,a1,a2
-0+0014 <[^>]*> nop
-0+0018 <[^>]*> div	zero,a3,t0
-0+001c <[^>]*> or	a0,a0,a1
-0+0020 <[^>]*> macc	a0,a1,a2
-0+0024 <[^>]*> nop
-0+0028 <[^>]*> divu	zero,a3,t0
-0+002c <[^>]*> or	a0,a0,a1
-0+0030 <[^>]*> dmacc	a0,a1,a2
-0+0034 <[^>]*> nop
-0+0038 <[^>]*> divu	zero,a3,t0
-0+003c <[^>]*> or	a0,a0,a1
-0+0040 <[^>]*> macc	a0,a1,a2
-0+0044 <[^>]*> nop
-0+0048 <[^>]*> ddiv	zero,a3,t0
-0+004c <[^>]*> or	a0,a0,a1
-0+0050 <[^>]*> dmacc	a0,a1,a2
-0+0054 <[^>]*> nop
-0+0058 <[^>]*> ddiv	zero,a3,t0
-0+005c <[^>]*> or	a0,a0,a1
-0+0060 <[^>]*> macc	a0,a1,a2
-0+0064 <[^>]*> nop
-0+0068 <[^>]*> ddivu	zero,a3,t0
-0+006c <[^>]*> or	a0,a0,a1
-0+0070 <[^>]*> dmacc	a0,a1,a2
-0+0074 <[^>]*> nop
-0+0078 <[^>]*> ddivu	zero,a3,t0
-0+007c <[^>]*> or	a0,a0,a1
-0+0080 <[^>]*> dmult	a0,a1
-0+0084 <[^>]*> nop
-0+0088 <[^>]*> dmult	a2,a3
-0+008c <[^>]*> or	a0,a0,a1
-0+0090 <[^>]*> dmultu	a0,a1
-0+0094 <[^>]*> nop
-0+0098 <[^>]*> dmultu	a2,a3
-0+009c <[^>]*> or	a0,a0,a1
-0+00a0 <[^>]*> dmacc	a0,a1,a2
-0+00a4 <[^>]*> nop
-0+00a8 <[^>]*> dmacc	a2,a3,t0
-0+00ac <[^>]*> or	a0,a0,a1
-0+00b0 <[^>]*> dmult	a0,a1
-0+00b4 <[^>]*> nop
-0+00b8 <[^>]*> dmacc	a2,a3,t0
-0+00bc <[^>]*> or	a0,a0,a1
-0+00c0 <[^>]*> macc	a0,a1,a2
-0+00c4 <[^>]*> nop
-0+00c8 <[^>]*> mtlo	a3
-0+00cc <[^>]*> dmacc	a0,a1,a2
-0+00d0 <[^>]*> nop
-0+00d4 <[^>]*> mtlo	a3
-0+00d8 <[^>]*> macc	a0,a1,a2
-0+00dc <[^>]*> nop
-0+00e0 <[^>]*> mthi	a3
-0+00e4 <[^>]*> dmacc	a0,a1,a2
-0+00e8 <[^>]*> nop
-0+00ec <[^>]*> mthi	a3
-#...
diff --git a/gas/testsuite/gas/mips/vr4122.s b/gas/testsuite/gas/mips/vr4122.s
deleted file mode 100644
index 4661e1a..0000000
--- a/gas/testsuite/gas/mips/vr4122.s
+++ /dev/null
@@ -1,65 +0,0 @@
-# Test workarounds selected by -mfix-vr4120.
-# Note that we only work around bugs gcc may generate.
-
-r21:
-	macc	$4,$5,$6
-	div	$0,$7,$8
-	or	$4,$5
-
-	dmacc	$4,$5,$6
-	div	$0,$7,$8
-	or	$4,$5
-
-	macc	$4,$5,$6
-	divu	$0,$7,$8
-	or	$4,$5
-
-	dmacc	$4,$5,$6
-	divu	$0,$7,$8
-	or	$4,$5
-
-	macc	$4,$5,$6
-	ddiv	$0,$7,$8
-	or	$4,$5
-
-	dmacc	$4,$5,$6
-	ddiv	$0,$7,$8
-	or	$4,$5
-
-	macc	$4,$5,$6
-	ddivu	$0,$7,$8
-	or	$4,$5
-
-	dmacc	$4,$5,$6
-	ddivu	$0,$7,$8
-	or	$4,$5
-
-r23:
-	dmult	$4,$5
-	dmult	$6,$7
-	or	$4,$5
-
-	dmultu	$4,$5
-	dmultu	$6,$7
-	or	$4,$5
-
-	dmacc	$4,$5,$6
-	dmacc	$6,$7,$8
-	or	$4,$5
-
-	dmult	$4,$5
-	dmacc	$6,$7,$8
-	or	$4,$5
-
-r24:
-	macc	$4,$5,$6
-	mtlo	$7
-
-	dmacc	$4,$5,$6
-	mtlo	$7
-
-	macc	$4,$5,$6
-	mthi	$7
-
-	dmacc	$4,$5,$6
-	mthi	$7