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authorJan Beulich <jbeulich@novell.com>2005-05-25 06:50:23 +0000
committerJan Beulich <jbeulich@novell.com>2005-05-25 06:50:23 +0000
commit3d456fa193c525d78728ce37289c06be939b888c (patch)
tree28ef44aeae38abfea0e7951fc32242cefb4ed3df /gas
parentc7e2e997e4681ed5de3c3b19a583b637dd81332b (diff)
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gas/testsuite/
2005-05-25 Jan Beulich <jbeulich@novell.com> * gas/i386/intelok.d: Account for 32-bit displacements being shown in hex. opcodes/ 2005-05-25 Jan Beulich <jbeulich@novell.com> * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in hex (but retain it being displayed as signed). Remove redundant checks. Add handling of displacements for 16-bit addressing in Intel mode.
Diffstat (limited to 'gas')
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/i386/intelok.d6
2 files changed, 8 insertions, 3 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 7705ed4..14a58c3 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2005-05-25 Jan Beulich <jbeulich@novell.com>
+
+ * gas/i386/intelok.d: Account for 32-bit displacements being shown
+ in hex.
+
2005-05-24 H.J. Lu <hongjiu.lu@intel.com>
* gas/elf/group0b.d: Updated.
diff --git a/gas/testsuite/gas/i386/intelok.d b/gas/testsuite/gas/i386/intelok.d
index e8a80a7..fb84866 100644
--- a/gas/testsuite/gas/i386/intelok.d
+++ b/gas/testsuite/gas/i386/intelok.d
@@ -104,8 +104,8 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: 8b 40 0c[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+12\]
[ ]*[0-9a-f]+: 8b 40 12[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+18\]
[ ]*[0-9a-f]+: 8b 40 12[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+18\]
-[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+2\]
-[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+2\]
+[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
+[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
[ ]*[0-9a-f]+: 8b 04 45 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*2\]
[ ]*[0-9a-f]+: 8b 04 45 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*2\]
[ ]*[0-9a-f]+: 8b 04 8d 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[ecx\*4\]
@@ -156,7 +156,7 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1]
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
-[ ]*[0-9a-f]+: 8b 80 01 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1\]
+[ ]*[0-9a-f]+: 8b 80 01 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?1\]
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1\]
[ ]*[0-9a-f]+: a1 01 00 00 00[ ]+mov[ ]+eax,ds:0x1